diff options
| author | Wenbin Mei <wenbin.mei@mediatek.com> | 2020-05-19 09:49:54 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-10-28 02:00:52 +0000 |
| commit | fc38e8834132f83ed59e6b0f59bd90c940edd991 (patch) | |
| tree | c721be1d214a930c96e879cc6cc4db7302a9903b /src/mainboard | |
| parent | 441c63d5f08272833603fdfb53bc61ec1f503e78 (diff) | |
mb/google/asurada: Configure pinctrl for SD and MMC
The pins for SD and MMC must be configured properly
so we can access them in payloads.
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Change-Id: Ie6bdffb987d5acf286645550f1c53f294f71c38a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/asurada/mainboard.c | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index 9146d7bc1d..7a37df5764 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -2,10 +2,71 @@ #include <console/console.h> #include <device/device.h> +#include <device/mmio.h> +#include <soc/gpio.h> #include <soc/usb.h> +#define MSDC0_DRV_MASK 0x3fffffff +#define MSDC1_DRV_MASK 0x3ffff000 +#define MSDC0_DRV_VALUE 0x24924924 +#define MSDC1_DRV_VALUE 0x24924000 + +static void configure_emmc(void) +{ + void *gpio_base = (void *)IOCFG_TL_BASE; + int i; + + const gpio_t emmc_pu_pin[] = { + GPIO(MSDC0_DAT0), GPIO(MSDC0_DAT1), + GPIO(MSDC0_DAT2), GPIO(MSDC0_DAT3), + GPIO(MSDC0_DAT4), GPIO(MSDC0_DAT5), + GPIO(MSDC0_DAT6), GPIO(MSDC0_DAT7), + GPIO(MSDC0_CMD), GPIO(MSDC0_RSTB), + }; + + const gpio_t emmc_pd_pin[] = { + GPIO(MSDC0_DSL), GPIO(MSDC0_CLK), + }; + + for (i = 0; i < ARRAY_SIZE(emmc_pu_pin); i++) + gpio_set_pull(emmc_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); + + for (i = 0; i < ARRAY_SIZE(emmc_pd_pin); i++) + gpio_set_pull(emmc_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); + + /* set eMMC cmd/dat/clk/ds/rstb pins driving to 10mA */ + clrsetbits32(gpio_base, MSDC0_DRV_MASK, MSDC0_DRV_VALUE); +} + +static void configure_sdcard(void) +{ + void *gpio_base = (void *)IOCFG_RM_BASE; + int i; + + const gpio_t sdcard_pu_pin[] = { + GPIO(MSDC1_DAT0), GPIO(MSDC1_DAT1), + GPIO(MSDC1_DAT2), GPIO(MSDC1_DAT3), + GPIO(MSDC1_CMD), + }; + + const gpio_t sdcard_pd_pin[] = { + GPIO(MSDC1_CLK), + }; + + for (i = 0; i < ARRAY_SIZE(sdcard_pu_pin); i++) + gpio_set_pull(sdcard_pu_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_UP); + + for (i = 0; i < ARRAY_SIZE(sdcard_pd_pin); i++) + gpio_set_pull(sdcard_pd_pin[i], GPIO_PULL_ENABLE, GPIO_PULL_DOWN); + + /* set sdcard cmd/dat/clk pins driving to 10mA */ + clrsetbits32(gpio_base, MSDC1_DRV_MASK, MSDC1_DRV_VALUE); +} + static void mainboard_init(struct device *dev) { + configure_emmc(); + configure_sdcard(); setup_usb_host(); } |