remove more warnings. move ROOT_COMPLEX selection to fam10

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

8 files changed, 16 insertions, 29 deletions

diff --git a/src/mainboard/amd/mahogany_fam10/Kconfig b/src/mainboard/amd/mahogany_fam10/Kconfig
index 1a6e12e669..339b9e81db 100644
--- a/src/mainboard/amd/mahogany_fam10/Kconfig
+++ b/src/mainboard/amd/mahogany_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_AMD_MAHOGANY_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_AM2R2
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_AMD_RS780
 	select SOUTHBRIDGE_AMD_SB700
 	select SUPERIO_ITE_IT8718F
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
index 50793c49dc..94a44ea579 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_AMD_SERENGETI_CHEETAH_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_F_1207
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_AMD_AMD8111
 	select SOUTHBRIDGE_AMD_AMD8132
 	select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index c748498fb7..b8a4483aff 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -67,10 +67,6 @@ unsigned int get_sbdn(unsigned bus);
 #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)
 #define RTC_DEV PNP_DEV(0x2e, W83627EHG_RTC)
 
-static void memreset_setup(void)
-{
-}
-
 static void memreset(int controllers, const struct mem_controller *ctrl)
 {
 }
@@ -80,11 +76,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	return smbus_read_byte(device, address);
 }
 
-void activate_spd_rom(const struct mem_controller *ctrl)
+static void activate_spd_rom(const struct mem_controller *ctrl)
 {
 }
 
-void soft_reset(void)
+static void soft_reset(void)
 {
 	uint8_t tmp;
 
@@ -247,7 +243,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
 
 	enable_smbus();
-	memreset_setup();
 	sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 	post_cache_as_ram();
 }
diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c
index c3702084e5..87517f078c 100644
--- a/src/mainboard/msi/ms9282/romstage.c
+++ b/src/mainboard/msi/ms9282/romstage.c
@@ -120,8 +120,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
 
-
-
 #include "cpu/amd/car/post_cache_as_ram.c"
 
 #include "cpu/amd/model_fxx/init_cpus.c"
@@ -151,12 +149,12 @@ static void sio_setup(void)
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	static const uint16_t spd_addr[] = {
-			// Node 0
-			RC0|(0xa<<3)|0, RC0|(0xa<<3)|2, RC0|(0xa<<3)|4, RC0|(0xa<<3)|6,
-			RC0|(0xa<<3)|1, RC0|(0xa<<3)|3, RC0|(0xa<<3)|5, RC0|(0xa<<3)|7,
-			// node 1
-			RC1|(0xa<<3)|0, RC1|(0xa<<3)|2, RC1|(0xa<<3)|4, RC1|(0xa<<3)|6,
-			RC1|(0xa<<3)|1, RC1|(0xa<<3)|3, RC1|(0xa<<3)|5, RC1|(0xa<<3)|7,
+		// Node 0
+		RC0|(0xa<<3)|0, RC0|(0xa<<3)|2, RC0|(0xa<<3)|4, RC0|(0xa<<3)|6,
+		RC0|(0xa<<3)|1, RC0|(0xa<<3)|3, RC0|(0xa<<3)|5, RC0|(0xa<<3)|7,
+		// node 1
+		RC1|(0xa<<3)|0, RC1|(0xa<<3)|2, RC1|(0xa<<3)|4, RC1|(0xa<<3)|6,
+		RC1|(0xa<<3)|1, RC1|(0xa<<3)|3, RC1|(0xa<<3)|5, RC1|(0xa<<3)|7,
 	};
 
 	unsigned bsp_apicid = 0;
@@ -181,18 +179,18 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
         }
 
-       w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-        uart_init();
-        console_init();
+	w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+	uart_init();
+	console_init();
 
-       /* Halt if there was a built in self test failure */
-       report_bist_failure(bist);
+	/* Halt if there was a built in self test failure */
+	report_bist_failure(bist);
 
-        setup_ms9282_resource_map();
+	setup_ms9282_resource_map();
 
-       setup_coherent_ht_domain();
+	setup_coherent_ht_domain();
 
-        wait_all_core0_started();
+	wait_all_core0_started();
 
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig
index 4a80544342..7bbd01c683 100644
--- a/src/mainboard/msi/ms9652_fam10/Kconfig
+++ b/src/mainboard/msi/ms9652_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_MSI_MS9652_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_F_1207
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_NVIDIA_MCP55
 	select SUPERIO_WINBOND_W83627EHG
 	select HAVE_BUS_CONFIG
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig
index 7a6e814911..1c7facc75b 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig
+++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_SUPERMICRO_H8DMR_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_F_1207
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_NVIDIA_MCP55
 	select SUPERIO_WINBOND_W83627HF
 	select HAVE_BUS_CONFIG
diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig
index 17bfd7f48e..5ae140e640 100644
--- a/src/mainboard/supermicro/h8qme_fam10/Kconfig
+++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_SUPERMICRO_H8QME_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_F_1207
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_AMD_AMD8132
 	select SOUTHBRIDGE_NVIDIA_MCP55
 	select SUPERIO_WINBOND_W83627HF
diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig
index 31001a808f..552b45dca8 100644
--- a/src/mainboard/tyan/s2912_fam10/Kconfig
+++ b/src/mainboard/tyan/s2912_fam10/Kconfig
@@ -3,7 +3,6 @@ config BOARD_TYAN_S2912_FAM10
 	select ARCH_X86
 	select CPU_AMD_SOCKET_F_1207
 	select NORTHBRIDGE_AMD_AMDFAM10
-	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select SOUTHBRIDGE_NVIDIA_MCP55
 	select SUPERIO_WINBOND_W83627HF
 	select HAVE_BUS_CONFIG