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authorFurquan Shaikh <furquan@chromium.org>2017-01-25 19:29:06 -0800
committerAaron Durbin <adurbin@chromium.org>2017-01-29 21:32:42 +0100
commitf8ab456a6328fa2a8f592d6ec7185015305c75ea (patch)
tree8e954993fb2ddf4a61807066d7b85d6ad4ef5dcf /src/mainboard
parenta7a517ddc5e2224f730c951bea9d93ca80ea0d7f (diff)
mainboard/google/snappy: Update WDT touchscreen device
Export PowerResource for WDT touchscreen device. BUG=chrome-os-partner:62311, chrome-os-partner:60194, chrome-os-partner:62371 BRANCH=reef TEST=Compiles successfully. Change-Id: Icc5be170353753201d3571c39b50e29424d4d6d3 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18240 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/reef/variants/snappy/devicetree.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb
index febc03fa80..6d7c8cacfc 100644
--- a/src/mainboard/google/reef/variants/snappy/devicetree.cb
+++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb
@@ -188,6 +188,11 @@ chip soc/intel/apollolake
register "generic.irq" = "IRQ_EDGE_LOW(GPIO_21_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)"
+ register "generic.reset_delay_ms" = "20"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end