diff options
author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-09 16:12:51 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-15 13:51:32 +0000 |
commit | f55e82c3939cee1fc4ac877a3a84c323268ec555 (patch) | |
tree | d93cd021d515ceb63bae2599ddba31e10751da2e /src/mainboard | |
parent | 90b1dc189112679cf808a942f6f860ce9a074c77 (diff) |
mb/google/brya: Add support for romstage GPIO table
Some variants may require more complex power sequencing than can be
accomodated with just 2 GPIO tables, therefore introduce one in romstage
as well.
BUG=b:187691798
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I7a63a2ee2cd036b9ae5822be9c87d8a026a54922
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/mainboard')
7 files changed, 23 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/romstage_spd_cbfs.c b/src/mainboard/google/brya/romstage_spd_cbfs.c index dc44c0d309..eadc2770d6 100644 --- a/src/mainboard/google/brya/romstage_spd_cbfs.c +++ b/src/mainboard/google/brya/romstage_spd_cbfs.c @@ -10,11 +10,15 @@ void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) { const struct mb_cfg *mem_config = variant_memory_params(); bool half_populated = variant_is_half_populated(); - const struct mem_spd spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, .cbfs_index = variant_memory_sku(), }; + const struct pad_config *pads; + size_t pads_num; memcfg_init(m_cfg, mem_config, &spd_info, half_populated); + + pads = variant_romstage_gpio_table(&pads_num); + gpio_configure_pads(pads, pads_num); } diff --git a/src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc b/src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc index 9fb63f5f43..6c29346470 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc +++ b/src/mainboard/google/brya/variants/baseboard/brask/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c +romstage-y += gpio.c + ramstage-y += gpio.c diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index f134431361..ecd5492348 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -422,3 +422,9 @@ const struct cros_gpio *__weak variant_cros_gpios(size_t *num) *num = ARRAY_SIZE(cros_gpios); return cros_gpios; } + +const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc b/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc index 9665436d28..8a4b2acfaa 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc +++ b/src/mainboard/google/brya/variants/baseboard/brya/Makefile.inc @@ -1,6 +1,7 @@ bootblock-y += gpio.c romstage-y += memory.c +romstage-y += gpio.c ramstage-y += gpio.c ramstage-y += ramstage.c diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index a3cebae69f..7dd73bc5a7 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -444,3 +444,9 @@ const struct cros_gpio *__weak variant_cros_gpios(size_t *num) *num = ARRAY_SIZE(cros_gpios); return cros_gpios; } + +const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index e88d0f95da..a2c1b4238c 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -16,6 +16,7 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_gpio_override_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); const struct cros_gpio *variant_cros_gpios(size_t *num); +const struct pad_config *variant_romstage_gpio_table(size_t *num); const struct mb_cfg *variant_memory_params(void); int variant_memory_sku(void); @@ -37,6 +38,6 @@ struct cpu_power_limits { /* Modify Power Limit devictree settings during ramstage */ void variant_update_power_limits(const struct cpu_power_limits *limits, - size_t num_entries); + size_t num_entries); #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/brya/variants/brya0/Makefile.inc b/src/mainboard/google/brya/variants/brya0/Makefile.inc index 646fd095aa..52d03980da 100644 --- a/src/mainboard/google/brya/variants/brya0/Makefile.inc +++ b/src/mainboard/google/brya/variants/brya0/Makefile.inc @@ -1,4 +1,5 @@ bootblock-y += gpio.c +romstage-y += gpio.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c ramstage-$(CONFIG_FW_CONFIG) += variant.c ramstage-y += gpio.c |