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authorIan Feng <ian_feng@compal.corp-partner.google.com>2022-06-20 18:00:38 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-23 12:18:50 +0000
commitefe749f380f2e2a398ad05f6dc0076957273817e (patch)
tree139240741bdf1b193dbab7e875534efdf7e0ad10 /src/mainboard
parentd234b07244f59609c636740eb249e20b225470e9 (diff)
mb/google/nissa/var/xivu: Generate RAM ID and SPD file
Add the support RAM parts for Xivu. Here is the ram part number list: DRAM Part Name ID to assign MT62F1G32D4DR-031 WT:B 0 (0000) MT62F512M32D2DR-031 WT:B 1 (0001) H9JCNNNBK3MLYR-N6E 1 (0001) K3LKBKB0BM-MGCP 2 (0010) BUG=b:236576117 BRANCH=None TEST=Use part_id_gen to generate related settings and emerge-nissa coreboot Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Change-Id: I02866f7dcdc70d1051d187fdda30e04bb654ece3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65252 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/Makefile.inc8
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt9
-rw-r--r--src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt4
3 files changed, 19 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
index eace2e443e..e063228cec 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
+++ b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc
@@ -1,5 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
-# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
+# Generated by:
+# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
-SPD_SOURCES = placeholder
+SPD_SOURCES =
+SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B
+SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E
+SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP
diff --git a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
index fa247902ee..c35d102efe 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
+++ b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt
@@ -1 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# This is an auto-generated file. Do not edit!!
+# Generated by:
+# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
+
DRAM Part Name ID to assign
+MT62F1G32D4DR-031 WT:B 0 (0000)
+MT62F512M32D2DR-031 WT:B 1 (0001)
+H9JCNNNBK3MLYR-N6E 1 (0001)
+K3LKBKB0BM-MGCP 2 (0010)
diff --git a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
index 96211370d9..1734074518 100644
--- a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
+++ b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt
@@ -9,3 +9,7 @@
# See util/spd_tools/README.md for more details and instructions.
# Part Name
+MT62F1G32D4DR-031 WT:B
+MT62F512M32D2DR-031 WT:B
+H9JCNNNBK3MLYR-N6E
+K3LKBKB0BM-MGCP