summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorTerry Chen <terry_chen@wistron.corp-partner.google.com>2022-06-08 17:47:06 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-06-15 18:04:46 +0000
commitef51b6d74285aa174e3898b4de7ce28048ebabdb (patch)
treeaead5e6b98e5eba82d20121195447bc59d0e8c22 /src/mainboard
parent1f07797d849cd86dea3a81f79454821b7217032f (diff)
mb/google/brya/var/crota: Enable VNN_1.05v_bypass rail
Some SKUs of crota have VNN 1.05v bypass rails for additional power savings in S0ix states. This patch uses FW_CONFIG to enable that feature when run on the applicable SKUs. BUG=b:233175019 BRANCH=none TEST=emerge-brya coreboot and verified pass Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com> Change-Id: Iaade50f4fe821b7114b3e2d44bda0747816da11c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Cyan Yang <cyan.yang@intel.corp-partner.google.com> Reviewed-by: YH Lin <yueherngl@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/crota/variant.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/crota/variant.c b/src/mainboard/google/brya/variants/crota/variant.c
index 29f684aa08..e8c62ebdc2 100644
--- a/src/mainboard/google/brya/variants/crota/variant.c
+++ b/src/mainboard/google/brya/variants/crota/variant.c
@@ -9,3 +9,20 @@ const char *get_wifi_sar_cbfs_filename(void)
{
return "wifi_sar_0.hex";
}
+
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+ if (fw_config_probe(FW_CONFIG(DB_LTE, LTE_USB))) {
+ config->ext_fivr_settings.configure_ext_fivr = 1;
+ config->ext_fivr_settings.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX;
+ config->ext_fivr_settings.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX;
+ config->ext_fivr_settings.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+ FIVR_VOLTAGE_MIN_ACTIVE |
+ FIVR_VOLTAGE_MIN_RETENTION;
+ config->ext_fivr_settings.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
+ FIVR_VOLTAGE_MIN_ACTIVE |
+ FIVR_VOLTAGE_MIN_RETENTION;
+ config->ext_fivr_settings.v1p05_icc_max_ma = 500;
+ config->ext_fivr_settings.vnn_sx_voltage_mv = 1250;
+ }
+}