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authorSean Rhodes <sean@starlabs.systems>2024-01-15 13:54:26 +0000
committerFelix Held <felix-coreboot@felixheld.de>2024-02-14 21:59:23 +0000
commite0377d15e39328d0da50656a98e2099355562409 (patch)
treef2536b291f6f53dbe8b078ac41b171d0b812b4a5 /src/mainboard
parent914cc53378d4bed07c3e688a72b131fe7dd74c4e (diff)
mb/starlabs/starbook/kbl: Remove tcc_offset entry
The TCC offset is configured in devtree.c, so remove it from the devicetree. Change-Id: I044a68854cc142b057cf31b4e2456d2ad1d0dd3a Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80461 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb
index 44ffb41e8f..96f7d782c6 100644
--- a/src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb
@@ -30,9 +30,6 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "3" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
- # Thermal
- register "tcc_offset" = "10"
-
# PM Util
# GPE configuration
# Note that GPE events called out in ASL code rely on this