diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-06-09 17:59:07 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-06-14 20:20:28 +0200 |
| commit | dec6d4e8c74e4bdd53018e6ae505bd56578035c6 (patch) | |
| tree | 9794ebcfa1c833cecf7f772e74a0c2fa7def097a /src/mainboard | |
| parent | b2f423578ea93bb5f1e56084ba42f4c7b68c130c (diff) | |
mainboard/google/{poppy,soraka}: Enable generation of SPI TPM ACPI node
Now that we dynamically disable TPM interface based on config options,
add support for generation of SPI TPM ACPI node if SPI TPM is used.
Change-Id: I87d28a42b48ba916c70e45a061c5efd91a8a59bf
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/20142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/poppy/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/variants/baseboard/devicetree.cb | 9 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/variants/soraka/devicetree.cb | 9 |
3 files changed, 17 insertions, 2 deletions
diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index e133f9f54d..6a28fbfed3 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -7,6 +7,7 @@ config BOARD_GOOGLE_BASEBOARD_POPPY select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_I2C_MAX98927 + select DRIVERS_SPI_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_LPC select HAVE_ACPI_RESUME diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index 7872a83f3e..ad8dfc25ab 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -428,7 +428,14 @@ chip soc/intel/skylake device pci 1d.3 off end # PCI Express Port 12 device pci 1e.0 on end # UART #0 device pci 1e.1 off end # UART #1 - device pci 1e.2 on end # GSPI #0 + device pci 1e.2 on + chip drivers/spi/acpi + register "hid" = "ACPI_DT_NAMESPACE_HID" + register "compat_string" = ""google,cr50"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" + device spi 0 on end + end + end # GSPI #0 device pci 1e.3 on end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index c38bf93635..e57cbd2c3e 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -416,7 +416,14 @@ chip soc/intel/skylake device pci 1d.3 off end # PCI Express Port 12 device pci 1e.0 on end # UART #0 device pci 1e.1 off end # UART #1 - device pci 1e.2 on end # GSPI #0 + device pci 1e.2 on + chip drivers/spi/acpi + register "hid" = "ACPI_DT_NAMESPACE_HID" + register "compat_string" = ""google,cr50"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)" + device spi 0 on end + end + end # GSPI #0 device pci 1e.3 on end # GSPI #1 device pci 1e.4 on end # eMMC device pci 1e.5 off end # SDIO |