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authordavid <david_wu@quantatw.com>2015-11-03 18:38:47 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-11-10 14:09:43 +0100
commitdc5b10bd9280024e504d9127fbf96264b4b17c24 (patch)
treef0e6945436cf58ba560f1c54046a55f7924954c1 /src/mainboard
parentdcbb1287a71bc6ed7f8e93fcb4bdc8557af6b3fb (diff)
google/{chell,lars}: Enable Fan control support
Copy from the CL https://chromium-review.googlesource.com/#/c/307028/ (I40c540dad32beefe249f025b570c347d3ad08c36) BRANCH=None BUG=None TEST=emerge-lars coreboot Change-Id: I131fb729661f0f3bfd198cdf238c627bf38a46a5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 70d471c507d12924466979c93742944975a03f27 Original-Change-Id: I0128dc65110ba363185db9c2aca5cdb140c344c2 Original-Signed-off-by: David Wu <David_Wu@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/310394 Original-Commit-Ready: David Wu <david_wu@quantatw.com> Original-Tested-by: David Wu <david_wu@quantatw.com> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/12344 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/chell/acpi/dptf.asl3
-rw-r--r--src/mainboard/google/lars/acpi/dptf.asl37
2 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/google/chell/acpi/dptf.asl b/src/mainboard/google/chell/acpi/dptf.asl
index 15f7275b24..45783dcf40 100644
--- a/src/mainboard/google/chell/acpi/dptf.asl
+++ b/src/mainboard/google/chell/acpi/dptf.asl
@@ -40,6 +40,9 @@
/* SKL-Y EC already has a custom charge profile based on temperature. */
#undef DPTF_ENABLE_CHARGER
+/* SKL-Y is Fanless design. */
+#undef DPTF_ENABLE_FAN_CONTROL
+
Name (DTRT, Package () {
/* CPU Throttle Effect on CPU */
Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },
diff --git a/src/mainboard/google/lars/acpi/dptf.asl b/src/mainboard/google/lars/acpi/dptf.asl
index 73ed77b753..2eea80438e 100644
--- a/src/mainboard/google/lars/acpi/dptf.asl
+++ b/src/mainboard/google/lars/acpi/dptf.asl
@@ -38,6 +38,7 @@
#define DPTF_TSR2_CRITICAL 70
#define DPTF_ENABLE_CHARGER
+#define DPTF_ENABLE_FAN_CONTROL
/* Charger performance states, board-specific values from charger and EC */
Name (CHPS, Package () {
@@ -48,6 +49,42 @@ Name (CHPS, Package () {
Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0.0A */
})
+#ifdef DPTF_ENABLE_FAN_CONTROL
+/* DFPS: Fan Performance States */
+Name (DFPS, Package () {
+ 0, // Revision
+ /*
+ * TODO : Need to update this Table after characterization.
+ * These are initial reference values.
+ */
+ /* Control, Trip Point, Speed, NoiseLevel, Power */
+ Package () {100, 0xFFFFFFFF, 4986, 220, 2200},
+ Package () {90, 0xFFFFFFFF, 4804, 180, 1800},
+ Package () {80, 0xFFFFFFFF, 4512, 145, 1450},
+ Package () {70, 0xFFFFFFFF, 4204, 115, 1150},
+ Package () {60, 0xFFFFFFFF, 3838, 90, 900},
+ Package () {50, 0xFFFFFFFF, 3402, 65, 650},
+ Package () {40, 0xFFFFFFFF, 2904, 45, 450},
+ Package () {30, 0xFFFFFFFF, 2337, 30, 300},
+ Package () {20, 0xFFFFFFFF, 1608, 15, 150},
+ Package () {10, 0xFFFFFFFF, 800, 10, 100},
+ Package () {0, 0xFFFFFFFF, 0, 0, 50}
+})
+
+Name (DART, Package () {
+ /* Fan effect on CPU */
+ 0, // Revision
+ Package () {
+ /*
+ * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
+ * AC7, AC8, AC9
+ */
+ \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 90, 80, 70, 60, 0, 0,
+ 0, 0, 0
+ }
+})
+#endif
+
Name (DTRT, Package () {
/* CPU Throttle Effect on CPU */
Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 },