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authorFelix Singer <felixsinger@posteo.net>2024-01-14 00:16:26 +0100
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-14 23:26:48 +0000
commitdc1a6ad62ad0e249d4e864075ab4e7b1bdf7730f (patch)
tree5954e11a9abff49e93b0a7540aeb58e43519dcaa /src/mainboard
parent614e6defbc613797a991f32fbc36a6b8ce99ea84 (diff)
mb/asrock/b75m-itx: Use chipset dt reference names
Use the references from the chipset devicetree as this makes the comments superfluous. Change-Id: I369ae1fd66326a2cbfa3fe155b0118251e2272d9 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79971 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kevin Keijzer <kevin@quietlife.nl> Reviewed-by: Janik Haag Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asrock/b75m-itx/devicetree.cb52
1 files changed, 26 insertions, 26 deletions
diff --git a/src/mainboard/asrock/b75m-itx/devicetree.cb b/src/mainboard/asrock/b75m-itx/devicetree.cb
index 6d4ca2d168..59645f04f2 100644
--- a/src/mainboard/asrock/b75m-itx/devicetree.cb
+++ b/src/mainboard/asrock/b75m-itx/devicetree.cb
@@ -7,13 +7,13 @@ chip northbridge/intel/sandybridge
register "spd_addresses" = "{0x50, 0, 0x52, 0}"
device domain 0 on
- device pci 00.0 on
+ device ref host_bridge on
subsystemid 0x1849 0x0150
end
- device pci 01.0 on
+ device ref peg10 on
subsystemid 0x1849 0x0151
end
- device pci 02.0 on
+ device ref igd on
subsystemid 0x1849 0x0152
end
chip southbridge/intel/bd82x6x
@@ -28,42 +28,42 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
- device pci 14.0 on # USB 3.0 Controller
+ device ref xhci on
subsystemid 0x1849 0x1e31
end
- device pci 16.0 on # Management Engine Interface 1
+ device ref mei1 on
subsystemid 0x1849 0x1e3a
end
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT
- device pci 19.0 off end # Intel Gigabit Ethernet
- device pci 1a.0 on # USB2 EHCI #2
+ device ref mei2 off end
+ device ref me_ide_r off end
+ device ref me_kt off end
+ device ref gbe off end
+ device ref ehci2 on
subsystemid 0x1849 0x1e2d
end
- device pci 1b.0 on # HDA Audio controller
+ device ref hda on
subsystemid 0x1849 0x8892
end
- device pci 1c.0 on # PCIe Port #1
+ device ref pcie_rp1 on
subsystemid 0x1849 0x1e10
end
- device pci 1c.1 off end # PCIe Port #2
- device pci 1c.2 off end # PCIe Port #3
- device pci 1c.3 on # PCIe Port #4, Realtek PCIe GbE Controller
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 off end
+ device ref pcie_rp4 on # Realtek PCIe GbE Controller
subsystemid 0x1849 0x1e16
device pci 00.0 on end # PCI 10ec:8168
end
- device pci 1c.4 off end # PCIe Port #5
- device pci 1c.5 on # PCIe Port #6
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 on
subsystemid 0x1849 0x1e1a
end
- device pci 1c.6 off end # PCIe Port #7
- device pci 1c.7 off end # PCIe Port #8
- device pci 1d.0 on # USB2 EHCI #1
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref ehci1 on
subsystemid 0x1849 0x1e26
end
- device pci 1e.0 off end # PCI bridge
- device pci 1f.0 on # LPC bridge
+ device ref pci_bridge off end
+ device ref lpc on
subsystemid 0x1849 0x1e49
chip superio/nuvoton/nct6776
device pnp 2e.0 off end # Floppy
@@ -117,14 +117,14 @@ chip northbridge/intel/sandybridge
end
end
end
- device pci 1f.2 on # SATA Controller 1
+ device ref sata1 on
subsystemid 0x1849 0x1e02
end
- device pci 1f.3 on # SMBus
+ device ref smbus on
subsystemid 0x1849 0x1e22
end
- device pci 1f.5 off end
- device pci 1f.6 off end # Thermal
+ device ref sata2 off end
+ device ref thermal off end
end
end
end