diff options
| author | Johnny Li <johnny_li@wistron.corp-partner.google.com> | 2022-11-02 13:43:00 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-11-18 00:38:25 +0000 |
| commit | d7328abc9589008bb0258ed214b9d97bda42ad79 (patch) | |
| tree | 2cf2f7497136181adef90e3ad0223550b8092087 /src/mainboard | |
| parent | 457f77be37e73e6a06f7cc0c16f14bc462b682f9 (diff) | |
mb/google/brya/variants/crota: Configure TDC current for VR domains.
+-----------+-------+-------+---------+-------------+----------+
| Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time |
| |(mOhms)|(mOhms)| (A) | (A) | (msec) |
+-----------+-------+-------+---------+-------------+----------+
| IA | 2.8 | 2.8 | 80 | 43 | 28000 |
+-----------+-------+-------+---------+-------------+----------+
| GT | 3.2 | 3.2 | 40 | 23 | 28000 |
+-----------+-------+-------+---------+-------------+----------+
- IA TDC current from 20A to 43A.
- GT TDC current from 20A to 23A.
BUG=b:256754175
TEST=Build test image and use PTAT to check IA and GT value
Signed-off-by: Johnny Li <johnny_li@wistron.corp-partner.google.com>
Change-Id: Ife36655f077bae567bff3c3e33f779c990cf5ed9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69135
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Yang <paul.f.yang@intel.corp-partner.google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/crota/overridetree.cb | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index 847cf6c2e4..01a8aadcaf 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -21,6 +21,31 @@ chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" register "max_dram_speed_mts" = "4800" register "cnvi_bt_audio_offload" = "1" + # +-----------+-------+-------+---------+-------------+----------+ + # | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time | + # | |(mOhms)|(mOhms)| (A) | (A) | (msec) | + # +-----------+-------+-------+---------+-------------+----------+ + # | IA | 2.8 | 2.8 | 80 | 43 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + # | GT | 3.2 | 3.2 | 40 | 23 | 28000 | + # +-----------+-------+-------+---------+-------------+----------+ + register "domain_vr_config[VR_DOMAIN_IA]" = "{ + .vr_config_enable = 1, + .ac_loadline = 280, + .dc_loadline = 280, + .icc_max = VR_CFG_AMP(80), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(43), + }" + + register "domain_vr_config[VR_DOMAIN_GT]" = "{ + .vr_config_enable = 1, + .ac_loadline = 320, + .dc_loadline = 320, + .icc_max = VR_CFG_AMP(40), + .tdc_timewindow = 28000, + .tdc_currentlimit = VR_CFG_TDC_AMP(23), + }" # Acoustic settings register "acoustic_noise_mitigation" = "1" |