diff options
| author | Ian Feng <ian_feng@compal.corp-partner.google.com> | 2022-09-16 15:16:13 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-09-20 07:54:55 +0000 |
| commit | d4eb998fc17266a9671c15f6d11f039b8a5e72d6 (patch) | |
| tree | 722b1e1fcd4740e9cb19a77a84b7bb7c05bc8682 /src/mainboard | |
| parent | 082d822861fb1cf1c27def8bae3e137d8a298af1 (diff) | |
mb/google/nissa/var/xivu: Add supported new memory part
Add new ram_id:3 (0011) for memory part K3LKCKC0BM-MGCP.
DRAM Part Name ID to assign
K3LKCKC0BM-MGCP 3 (0011)
BUG=b:247039096
TEST=Use part_id_gen to generate related settings and
emerge-nissa coreboot
Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Change-Id: I78d2e501b9d8d801a3d149002f638125bf4275f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard')
3 files changed, 5 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc index e063228cec..853599749a 100644 --- a/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/xivu/memory/Makefile.inc @@ -1,9 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt SPD_SOURCES = SPD_SOURCES += spd/lp5/set-0/spd-2.hex # ID = 0(0b0000) Parts = MT62F1G32D4DR-031 WT:B SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 1(0b0001) Parts = MT62F512M32D2DR-031 WT:B, H9JCNNNBK3MLYR-N6E SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = K3LKBKB0BM-MGCP +SPD_SOURCES += spd/lp5/set-0/spd-6.hex # ID = 3(0b0011) Parts = K3LKCKC0BM-MGCP diff --git a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt index c35d102efe..579a4fa802 100644 --- a/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/xivu/memory/dram_id.generated.txt @@ -1,10 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# /tmp/go-build2397504908/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brya/variants/xivu/memory/ src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt DRAM Part Name ID to assign MT62F1G32D4DR-031 WT:B 0 (0000) MT62F512M32D2DR-031 WT:B 1 (0001) H9JCNNNBK3MLYR-N6E 1 (0001) K3LKBKB0BM-MGCP 2 (0010) +K3LKCKC0BM-MGCP 3 (0011) diff --git a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt index 1734074518..2d8f7bee4e 100644 --- a/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/xivu/memory/mem_parts_used.txt @@ -13,3 +13,4 @@ MT62F1G32D4DR-031 WT:B MT62F512M32D2DR-031 WT:B H9JCNNNBK3MLYR-N6E K3LKBKB0BM-MGCP +K3LKCKC0BM-MGCP |