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authorWerner Zeh <werner.zeh@siemens.com>2021-05-31 07:27:50 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-06-04 12:40:06 +0000
commitb2bb959ecf1d2a4b5f0f65d0f36dec271e401445 (patch)
treef03f3aa809518836f355852d0c6e929252058c1e /src/mainboard
parenta67bda339e6f6bf301976c575901dcab0a1f5ffc (diff)
mb/siemens/mc_apl2: Disable unused I2C controllers
Only I2C controller 3 is used on this mainboard. Disable all other controllers. Change-Id: Id06d98787a0574a5b3a8dc2e86858dfcc7154606 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55090 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
index 06f4c050bb..1749636157 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb
@@ -97,9 +97,9 @@ chip soc/intel/apollolake
end
device pci 15.0 on end # - XHCI
device pci 15.1 off end # - XDCI
- device pci 16.0 on end # - I2C 0
- device pci 16.1 on end # - I2C 1
- device pci 16.2 on end # - I2C 2
+ device pci 16.0 off end # - I2C 0
+ device pci 16.1 off end # - I2C 1
+ device pci 16.2 off end # - I2C 2
device pci 16.3 on # - I2C 3
# Enable external RTC chip
chip drivers/i2c/rx6110sa
@@ -115,10 +115,10 @@ chip soc/intel/apollolake
device i2c 0x32 on end # RTC RX6110 SA
end
end
- device pci 17.0 on end # - I2C 4
- device pci 17.1 on end # - I2C 5
- device pci 17.2 on end # - I2C 6
- device pci 17.3 on end # - I2C 7
+ device pci 17.0 off end # - I2C 4
+ device pci 17.1 off end # - I2C 5
+ device pci 17.2 off end # - I2C 6
+ device pci 17.3 off end # - I2C 7
device pci 18.0 on end # - UART 0
device pci 18.1 on end # - UART 1
device pci 18.2 on end # - UART 2