spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()

In pursuit of the goal of eliminating the proliferation of raw region
devices to represent CBFS files outside of the CBFS core code, this
patch removes the get_spd_cbfs_rdev() API and instead replaces it with
spd_cbfs_map() which will find and map the SPD file in one go and return
a pointer to the relevant section. (This makes it impossible to unmap
the mapping again, which all but one of the users didn't bother to do
anyway since the API is only used on platforms with memory-mapped
flash. Presumably this will stay that way in the future so this is not
something worth worrying about.)

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iec7571bec809f2f0712e7a97b4c853b8b40702d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

6 files changed, 23 insertions, 36 deletions

diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c
index f307f95d73..fd005a6bf2 100644
--- a/src/mainboard/facebook/fbg1701/romstage.c
+++ b/src/mainboard/facebook/fbg1701/romstage.c
@@ -18,7 +18,6 @@
 void mainboard_memory_init_params(struct romstage_params *params,
 				  MEMORY_INIT_UPD *memory_params)
 {
-	struct region_device spd_rdev;
 	u8 spd_index = 0;
 
 	if (!CONFIG(ONBOARD_SAMSUNG_MEM)) {
@@ -28,11 +27,10 @@ void mainboard_memory_init_params(struct romstage_params *params,
 			spd_index = 2;
 	}
 
-	if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
-		die("spd.bin not found\n");
-
 	memory_params->PcdMemoryTypeEnable = MEM_DDR3;
-	memory_params->PcdMemorySpdPtr = (uintptr_t)rdev_mmap_full(&spd_rdev);
+	memory_params->PcdMemorySpdPtr = spd_cbfs_map(spd_index);
+	if (!memory_params->PcdMemorySpdPtr)
+		die("spd.bin not found\n");
 	memory_params->PcdMemChannel0Config = 1; /* Memory down */
 	memory_params->PcdMemChannel1Config = 2; /* Disabled */
 }
diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c
index d3d81fde36..4b60a9cfc3 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/memory.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c
@@ -4,6 +4,7 @@
 #include <console/console.h>
 #include <gpio.h>
 #include <spd_bin.h>
+#include <string.h>
 #include <variant/gpio.h>
 #include <amdblocks/dimm_spd.h>
 
@@ -22,25 +23,22 @@ uint8_t __weak variant_memory_sku(void)
 int __weak variant_mainboard_read_spd(uint8_t spdAddress,
 							char *buf, size_t len)
 {
-	struct region_device spd_rdev;
 	u8 spd_index = variant_memory_sku();
 
 	printk(BIOS_INFO, "%s SPD index %d\n", __func__, spd_index);
 
-	if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) {
+	void *spd = (void *)spd_cbfs_map(spd_index);
+	if (!spd) {
 		printk(BIOS_ERR, "Error: spd.bin not found\n");
 		return -1;
 	}
 
-	if (len != region_device_sz(&spd_rdev)) {
+	if (len != CONFIG_DIMM_SPD_SIZE) {
 		printk(BIOS_ERR, "Error: spd.bin is not the correct size\n");
 		return -1;
 	}
 
-	if (rdev_readat(&spd_rdev, buf, 0, len) != len) {
-		printk(BIOS_ERR, "Error: couldn't read spd.bin\n");
-		return -1;
-	}
+	memcpy(buf, spd, len);
 
 	return 0;
 }
diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
index 97617cc1b5..160f0a53ff 100644
--- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c
@@ -14,15 +14,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	printk(BIOS_DEBUG, "spd index is 0x%x\n", spd_index);
 
 	if (spd_index > 0 && spd_index != 2) {
-		struct region_device spd_rdev;
-
-		if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
-			die("spd.bin not found\n");
-
-		mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev);
+		mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE;
 
 		/* Memory leak is ok since we have memory mapped boot media */
-		mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
+		mem_cfg->MemorySpdPtr00 = spd_cbfs_map(spd_index);
+		if (!mem_cfg->MemorySpdPtr00)
+			die("spd.bin not found\n");
 		mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
 
 		mem_cfg->SpdAddressTable[0] = 0x0;
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index 79206e00c8..bc4c6de661 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -28,14 +28,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
 
 	if (CONFIG(BOARD_INTEL_KBLRVP3)) {
-		struct region_device spd_rdev;
-
 		mem_cfg->DqPinsInterleaved = 0;
-		if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
-			die("spd.bin not found\n");
-		mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev);
+		mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE;
 		/* Memory leak is ok since we have memory mapped boot media */
-		mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
+		mem_cfg->MemorySpdPtr00 = spd_cbfs_map(spd_index);
+		if (!mem_cfg->MemorySpdPtr00)
+			die("spd.bin not found\n");
 	} else { /* CONFIG_BOARD_INTEL_KBLRVP7 and CONFIG_BOARD_INTEL_KBLRVP8 */
 		struct spd_block blk = {
 			.addr_map = { 0x50, 0x51, 0x52, 0x53, },
diff --git a/src/mainboard/portwell/m107/romstage.c b/src/mainboard/portwell/m107/romstage.c
index 3ba12f30ff..d6d495518a 100644
--- a/src/mainboard/portwell/m107/romstage.c
+++ b/src/mainboard/portwell/m107/romstage.c
@@ -12,7 +12,6 @@
 void mainboard_memory_init_params(struct romstage_params *params,
 	MEMORY_INIT_UPD *memory_params)
 {
-	struct region_device spd_rdev;
 	u8 spd_index = 0;
 
 	if (CONFIG(ONBOARD_MEM_MICRON))
@@ -20,11 +19,10 @@ void mainboard_memory_init_params(struct romstage_params *params,
 	else if (CONFIG(ONBOARD_MEM_KINGSTON))
 		spd_index = 2;
 
-	if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
-		die("spd.bin not found\n");
-
 	memory_params->PcdMemoryTypeEnable = MEM_DDR3;
-	memory_params->PcdMemorySpdPtr = (uintptr_t)rdev_mmap_full(&spd_rdev);
+	memory_params->PcdMemorySpdPtr = spd_cbfs_map(spd_index);
+	if (!memory_params->PcdMemorySpdPtr)
+		die("spd.bin not found\n");
 	memory_params->PcdMemChannel0Config = 1; /* Memory down */
 	memory_params->PcdMemChannel1Config = 2; /* Disabled */
 }
diff --git a/src/mainboard/razer/blade_stealth_kbl/romstage.c b/src/mainboard/razer/blade_stealth_kbl/romstage.c
index 92ced2e613..02bfda4846 100644
--- a/src/mainboard/razer/blade_stealth_kbl/romstage.c
+++ b/src/mainboard/razer/blade_stealth_kbl/romstage.c
@@ -30,15 +30,13 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 	mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
 	mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
 
-	struct region_device spd_rdev;
-
 	mem_cfg->DqPinsInterleaved = 0;
-	if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
-		die("spd.bin not found\n");
-	mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev);
+	mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE;
 	/* Memory leak is ok since we have memory mapped boot media */
 	// TODO evaluate google/eve way of loading
-	mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
+	mem_cfg->MemorySpdPtr00 = spd_cbfs_map(spd_index);
+	if (!mem_cfg->MemorySpdPtr00)
+		die("spd.bin not found\n");
 	mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00;
 
 	mupd->FspmTestConfig.DmiVc1 = 1;