diff options
author | Jonathan Zhang <jonzhang@fb.com> | 2020-06-01 16:03:30 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 12:21:35 +0000 |
commit | a3db721633b8e2f226af60864562af192e5576e2 (patch) | |
tree | 84134741ce14952844990f7608dc9669071ce63a /src/mainboard | |
parent | 826523b679d0ca0c2435b9de6ad4c01da360f038 (diff) |
mb/ocp/deltalake: add RW_MRC_CACHE flash region
Add RW_MRC_CACHE flash region to hold MRC cache data.
With memory training skipped for subsequent reboots, the boot
time is reduced by 8 minutes on OCP Delta Lake server, when
FSP verbose logging is turned on.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I27ed00100e1ea9e29b0e71ea5a8397cd550e193a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42025
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/ocp/deltalake/board.fmd | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/ocp/deltalake/board.fmd b/src/mainboard/ocp/deltalake/board.fmd index 24c7f33876..a0c8dc5f8b 100644 --- a/src/mainboard/ocp/deltalake/board.fmd +++ b/src/mainboard/ocp/deltalake/board.fmd @@ -6,6 +6,7 @@ FLASH 64M { } SI_BIOS@0x3000000 0x1000000 { FMAP@0x0 0x800 - COREBOOT(CBFS)@0x800 0xfff800 + RW_MRC_CACHE@0x1000 0x10000 + COREBOOT(CBFS)@0x11000 } } |