diff options
author | John Su <john_su@compal.corp-partner.google.com> | 2021-03-02 10:47:50 +0800 |
---|---|---|
committer | Edward O'Callaghan <quasisec@chromium.org> | 2021-03-05 04:47:36 +0000 |
commit | 99059d170aec06096cb3efe30a84830e5a7f9c22 (patch) | |
tree | 9aead8a3600711eb1ccb5fb14a2bc1998e3d3d02 /src/mainboard | |
parent | 2f78ce0995a6dd0630802a918438c4d3b1c328fc (diff) |
mb/google/zork/var/vilboz: Update telemetry settings
Update telemetry settings for vilboz.
VDD Slope : 26939 -> 27225
VDD Offset: 125 -> 187
SOC Slope : 20001 -> 26559
SOC Offset: 168 -> 89
BUG=b:177162553
BRANCH=zork
TEST=emerge-zork coreboot
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Iaf7c5083c4c5affec5ae0b5583efb5237e10d0ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: chris wang <Chris.Wang@amd.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/zork/variants/vilboz/overridetree.cb | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index 6146e40572..35936baf7d 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -18,10 +18,10 @@ chip soc/amd/picasso # End : OPN Performance Configuration - register "telemetry_vddcr_vdd_slope_mA" = "26939" - register "telemetry_vddcr_vdd_offset" = "125" - register "telemetry_vddcr_soc_slope_mA" = "20001" - register "telemetry_vddcr_soc_offset" = "168" + register "telemetry_vddcr_vdd_slope_mA" = "27225" + register "telemetry_vddcr_vdd_offset" = "187" + register "telemetry_vddcr_soc_slope_mA" = "26559" + register "telemetry_vddcr_soc_offset" = "89" # eDP phy tuning settings register "edp_phy_override" = "ENABLE_EDP_TUNINGSET" |