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authorShelley Chen <shchen@google.com>2024-01-25 15:53:53 -0800
committerShelley Chen <shchen@google.com>2024-01-26 23:06:45 +0000
commit94af3e551b250375b44050fdafd79f7e9f16f361 (patch)
tree82a8f91e160dca935fad9110e53702890830b142 /src/mainboard
parent50c8f2ef363637ee6219d4771ed5311489686285 (diff)
mb/google/brox: Remove CNVi Bluetooth
This is causing an assertion error on the devices that don't have CNVi enabled because CNVi is hidden behind a FW_CONFIG flag in the overridetree now. BUG=b:319188820 BRANCH=None TEST=emerge-brox coreboot chromeos-bootimage make sure we can boot to kernel on device. Change-Id: Ifcfbc04825d4d4e7f2874a4c52f9c5cf3e657856 Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80211 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
index fd2c8ed72f..be31df6837 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
+++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb
@@ -23,9 +23,6 @@ chip soc/intel/alderlake
register "tcc_offset" = "10" # TCC of 90
- # Enable CNVi BT
- register "cnvi_bt_core" = "true"
-
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C2