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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-06 08:14:57 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-16 19:54:49 +0000
commit8c9a89de9961e7029835e987cb0f705b7efa77a7 (patch)
treef0840d70ad26d96c43aa8bcfde47d0727663cefe /src/mainboard
parentd614e85418c1fb524df34bb7522ccd6b410296a1 (diff)
arch/x86/ioapic: Drop irq_on_fsb as a configurable item
APIC Serial Bus pins were removed with ICH5 already, so a choice 'irq_on_fsb = 0' would not take effect. The related register BOOT_CONFIG 0x3 is also not documented since ICH5. For emulation/qemu-q35 with ICH9 the choice INTERRUPT_ON_APIC_BUS was wrong and ignored as BOOT_CONFIG register emulation was never implemented. For ICH4 and earlier, the choice to use FSB can be made based on the installed CPU model but this is now just hardwired to match P4 CPUs of aopen/dxplplusu. For sb/intel/i82371eb register BOOT_CONFIG 0x3 is also not defined and the only possible operation mode there is APIC Serial Bus, which requires no configuration. Change-Id: Id433e0e67cb83b44a3041250481f307b2ed1ad18 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55257 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/emulation/qemu-q35/Kconfig1
-rw-r--r--src/mainboard/lenovo/t400/devicetree.cb1
-rw-r--r--src/mainboard/lenovo/x200/devicetree.cb1
-rw-r--r--src/mainboard/roda/rk9/devicetree.cb1
-rw-r--r--src/mainboard/samsung/lumpy/devicetree.cb1
5 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
index 537841ec53..c3b6ea6c54 100644
--- a/src/mainboard/emulation/qemu-q35/Kconfig
+++ b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -4,7 +4,6 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select CPU_QEMU_X86
select SOUTHBRIDGE_INTEL_I82801IX
- select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
select HAVE_CMOS_DEFAULT
select HAVE_OPTION_TABLE
# select HAVE_PIRQ_TABLE
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb
index 5886aff48c..ae389de5dd 100644
--- a/src/mainboard/lenovo/t400/devicetree.cb
+++ b/src/mainboard/lenovo/t400/devicetree.cb
@@ -143,7 +143,6 @@ chip northbridge/intel/gm45
chip drivers/generic/ioapic
register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
register "base" = "(void *)0xfec00000"
device ioapic 2 on end
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index 80288bfcac..4db554b50b 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -133,7 +133,6 @@ chip northbridge/intel/gm45
chip drivers/generic/ioapic
register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
register "base" = "(void *)0xfec00000"
device ioapic 2 on end
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index 39650537db..0af98373ca 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -121,7 +121,6 @@ chip northbridge/intel/gm45
device pci 1f.0 on # LPC bridge
chip drivers/generic/ioapic
register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
register "base" = "(void *)0xfec00000"
device ioapic 2 on end
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 716d1b85fb..13a2299086 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -107,7 +107,6 @@ chip northbridge/intel/sandybridge
chip drivers/generic/ioapic
register "have_isa_interrupts" = "1"
- register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
register "base" = "(void *)0xfec00000"
device ioapic 4 on end