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authorRobert Chen <robert.chen@quanta.corp-partner.google.com>2024-05-08 22:05:21 -0400
committerFelix Held <felix-coreboot@felixheld.de>2024-05-17 17:48:59 +0000
commit67a96902d5a2f416ced55aa6bc7b751dbfa93092 (patch)
tree33e0215d04448c64da73a5928a348d1857f9b04e /src/mainboard
parent917bdbffd3340599bfd2effa5a467294584b9885 (diff)
mb/google/dedede/var/kracko: Disable un-used C1 port by daughterboard
Probe C1 port in devicetree and disable un-used C1/A1 port by FW_CONFG. BUG=b:339534479 BRANCH=firmware-dedede-13606.B TEST=emerge-dedede coreboot chromeos-bootimage flash and check boot log on DUT. Change-Id: I944ff6f2fa712e7579ed1c9879f75835adc3ac4c Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82263 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/dedede/variants/kracko/overridetree.cb18
-rw-r--r--src/mainboard/google/dedede/variants/kracko/ramstage.c16
2 files changed, 34 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/kracko/overridetree.cb b/src/mainboard/google/dedede/variants/kracko/overridetree.cb
index 5e39c884e4..2c25e60a1b 100644
--- a/src/mainboard/google/dedede/variants/kracko/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/kracko/overridetree.cb
@@ -134,6 +134,15 @@ chip soc/intel/jasperlake
end
end
chip drivers/usb/acpi
+ register "desc" = ""Right Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
+ device usb 2.1 on
+ probe DB_PORTS DB_PORTS_1C_1A
+ probe DB_PORTS DB_PORTS_1C_LTE
+ end
+ end
+ chip drivers/usb/acpi
register "desc" = ""Right Type-A Port""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(2, 2)"
@@ -152,6 +161,15 @@ chip soc/intel/jasperlake
device usb 2.6 on end
end
chip drivers/usb/acpi
+ register "desc" = ""Right Type-C Port""
+ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
+ register "group" = "ACPI_PLD_GROUP(2, 1)"
+ device usb 3.1 on
+ probe DB_PORTS DB_PORTS_1C_1A
+ probe DB_PORTS DB_PORTS_1C_LTE
+ end
+ end
+ chip drivers/usb/acpi
register "desc" = ""LTE""
register "type" = "UPC_TYPE_INTERNAL"
register "group" = "ACPI_PLD_GROUP(2, 2)"
diff --git a/src/mainboard/google/dedede/variants/kracko/ramstage.c b/src/mainboard/google/dedede/variants/kracko/ramstage.c
index 255e58557e..459fc77dc1 100644
--- a/src/mainboard/google/dedede/variants/kracko/ramstage.c
+++ b/src/mainboard/google/dedede/variants/kracko/ramstage.c
@@ -11,7 +11,23 @@ static void ext_vr_update(void)
cfg->disable_external_bypass_vr = 1;
}
+static void usb_port_update(void)
+{
+ struct soc_intel_jasperlake_config *cfg = config_of_soc();
+
+ if (fw_config_is_provisioned() &&
+ fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_NONE))) {
+ /* Disable USB C1 port */
+ cfg->usb2_ports[1].enable = 0;
+ cfg->usb3_ports[1].enable = 0;
+ /* Disable USB A1 port */
+ cfg->usb2_ports[3].enable = 0;
+ cfg->usb3_ports[3].enable = 0;
+ }
+}
+
void variant_devtree_update(void)
{
ext_vr_update();
+ usb_port_update();
}