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authorElyes HAOUAS <ehaouas@noos.fr>2018-07-03 14:59:50 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-08-13 15:38:38 +0000
commit65bb5434f6eb9e1f0f72a52958193b38057cfad7 (patch)
tree03700327ee52e7dc06fda83b5d193eca0cac7611 /src/mainboard
parent870f69e2214d98a29e623a48953f305326e5870a (diff)
src: Get rid of non-local header treated as local
Change-Id: I2c5edadfd035c9af08af9ee326a5a2dc8b840faa Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl2
-rw-r--r--src/mainboard/asus/kcma-d8/dsdt.asl8
-rw-r--r--src/mainboard/asus/kfsn4-dre/dsdt.asl4
-rw-r--r--src/mainboard/asus/kgpe-d16/dsdt.asl8
-rw-r--r--src/mainboard/asus/p2b-ls/dsdt.asl6
-rw-r--r--src/mainboard/asus/p2b/dsdt.asl6
6 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
index 54ead92d47..f8709a4323 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
@@ -230,5 +230,5 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMDF10", "AMDACPI ", 100925440)
Z00A, 8
}
- #include "northbridge/amd/amdfam10/amdfam10_util.asl"
+ #include <northbridge/amd/amdfam10/amdfam10_util.asl>
}
diff --git a/src/mainboard/asus/kcma-d8/dsdt.asl b/src/mainboard/asus/kcma-d8/dsdt.asl
index 5754d7c2bc..b6dd211afa 100644
--- a/src/mainboard/asus/kcma-d8/dsdt.asl
+++ b/src/mainboard/asus/kcma-d8/dsdt.asl
@@ -39,8 +39,8 @@ DefinitionBlock (
0x00000001 /* OEM Revision */
)
{
- #include "northbridge/amd/amdfam10/amdfam10_util.asl"
- #include "southbridge/amd/sr5650/acpi/sr5650.asl"
+ #include <northbridge/amd/amdfam10/amdfam10_util.asl>
+ #include <southbridge/amd/sr5650/acpi/sr5650.asl>
/* Some global data */
Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
@@ -427,7 +427,7 @@ DefinitionBlock (
{
Name (_ADR, 0x00110000) // _ADR: Address
Name(_PRW, Package () {0x05, 0x04}) // Wake from S1-S4
- #include "southbridge/amd/sb700/acpi/sata.asl"
+ #include <southbridge/amd/sb700/acpi/sata.asl>
}
/* 0:12.0 SP5100 USB 0 */
@@ -477,7 +477,7 @@ DefinitionBlock (
{
Name (_ADR, 0x00140001) // _ADR: Address
Name(_PRW, Package () {0x05, 0x04}) // Wake from S1-S4
- #include "southbridge/amd/sb700/acpi/ide.asl"
+ #include <southbridge/amd/sb700/acpi/ide.asl>
}
/* 0:14.3 SP5100 LPC */
diff --git a/src/mainboard/asus/kfsn4-dre/dsdt.asl b/src/mainboard/asus/kfsn4-dre/dsdt.asl
index 575715cf66..f3d59ce470 100644
--- a/src/mainboard/asus/kfsn4-dre/dsdt.asl
+++ b/src/mainboard/asus/kfsn4-dre/dsdt.asl
@@ -39,7 +39,7 @@ DefinitionBlock (
0x00000001 /* OEM Revision */
)
{
- #include "northbridge/amd/amdfam10/amdfam10_util.asl"
+ #include <northbridge/amd/amdfam10/amdfam10_util.asl>
/* Some global data */
Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
@@ -404,7 +404,7 @@ DefinitionBlock (
Return (Local3)
}
-#include "southbridge/nvidia/ck804/acpi/ck804.asl"
+#include <southbridge/nvidia/ck804/acpi/ck804.asl>
/* PCI Routing Table Access */
Method (_PRT, 0, NotSerialized) {
diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl
index ab6547ceb5..7b78b5de2e 100644
--- a/src/mainboard/asus/kgpe-d16/dsdt.asl
+++ b/src/mainboard/asus/kgpe-d16/dsdt.asl
@@ -39,8 +39,8 @@ DefinitionBlock (
0x00000001 /* OEM Revision */
)
{
- #include "northbridge/amd/amdfam10/amdfam10_util.asl"
- #include "southbridge/amd/sr5650/acpi/sr5650.asl"
+ #include <northbridge/amd/amdfam10/amdfam10_util.asl>
+ #include <southbridge/amd/sr5650/acpi/sr5650.asl>
/* Some global data */
Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
@@ -427,7 +427,7 @@ DefinitionBlock (
{
Name (_ADR, 0x00110000) // _ADR: Address
Name(_PRW, Package () {0x05, 0x04}) // Wake from S1-S4
- #include "southbridge/amd/sb700/acpi/sata.asl"
+ #include <southbridge/amd/sb700/acpi/sata.asl>
}
/* 0:12.0 SP5100 USB 0 */
@@ -477,7 +477,7 @@ DefinitionBlock (
{
Name (_ADR, 0x00140001) // _ADR: Address
Name(_PRW, Package () {0x05, 0x04}) // Wake from S1-S4
- #include "southbridge/amd/sb700/acpi/ide.asl"
+ #include <southbridge/amd/sb700/acpi/ide.asl>
}
/* 0:14.3 SP5100 LPC */
diff --git a/src/mainboard/asus/p2b-ls/dsdt.asl b/src/mainboard/asus/p2b-ls/dsdt.asl
index 304a0f4e7d..73d9508ccc 100644
--- a/src/mainboard/asus/p2b-ls/dsdt.asl
+++ b/src/mainboard/asus/p2b-ls/dsdt.asl
@@ -116,7 +116,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Return (0x0B)
}
}
- #include "southbridge/intel/i82371eb/acpi/intx.asl"
+ #include <southbridge/intel/i82371eb/acpi/intx.asl>
PCI_INTX_DEV(LNKA, \_SB.PCI0.PX40.PIRA, 1)
PCI_INTX_DEV(LNKB, \_SB.PCI0.PX40.PIRB, 2)
@@ -174,7 +174,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Package (0x04) { 0x000CFFFF, 3, LNKD, 0 },
})
- #include "northbridge/intel/i440bx/acpi/sb_pci0_crs.asl"
+ #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl>
/* Begin southbridge block */
Device (PX40)
@@ -230,7 +230,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Return (BUF1)
}
}
- #include "southbridge/intel/i82371eb/acpi/i82371eb.asl"
+ #include <southbridge/intel/i82371eb/acpi/i82371eb.asl>
}
Device (PX43)
{
diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl
index 8ddbf28418..93f6afe83f 100644
--- a/src/mainboard/asus/p2b/dsdt.asl
+++ b/src/mainboard/asus/p2b/dsdt.asl
@@ -112,7 +112,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Return (0x0B)
}
}
- #include "southbridge/intel/i82371eb/acpi/intx.asl"
+ #include <southbridge/intel/i82371eb/acpi/intx.asl>
PCI_INTX_DEV(LNKA, \_SB.PCI0.PX40.PIRA, 1)
PCI_INTX_DEV(LNKB, \_SB.PCI0.PX40.PIRB, 2)
@@ -160,7 +160,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Package (0x04) { 0x000CFFFF, 3, LNKD, 0 },
})
- #include "northbridge/intel/i440bx/acpi/sb_pci0_crs.asl"
+ #include <northbridge/intel/i440bx/acpi/sb_pci0_crs.asl>
/* Begin southbridge block */
Device (PX40)
@@ -216,7 +216,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1)
Return (BUF1)
}
}
- #include "southbridge/intel/i82371eb/acpi/i82371eb.asl"
+ #include <southbridge/intel/i82371eb/acpi/i82371eb.asl>
}
Device (PX43)
{