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authorSeunghwan Kim <sh_.kim@samsung.com>2018-06-15 15:26:47 +0900
committerFurquan Shaikh <furquan@google.com>2018-06-21 01:47:41 +0000
commit5bf6347cf8e9c20fcb51aacaa8e3fcf24fea59da (patch)
tree32efbd79230c1de1b3b52edcba9802f39865d523 /src/mainboard
parentd4475fc6f9e511a88bcdc4354ee61f3b70816a7f (diff)
mb/google/poppy/variants/nautilus: Add SAR sensor device into devicetree.cb
This change defines SAR sensor device into devicetree.cb. Since only LTE sku has SAR sensor, we will use GPP_B20 as a device_present_gpio. BUG=None BRANCH=poppy TEST=Verified SAR sensor device is loaded by driver in Chrome OS Change-Id: Ib4969e4b82d18b1b1a599de8226c2d7d4bda7915 Signed-off-by: Seunghwan Kim <sh_.kim@samsung.com> Reviewed-on: https://review.coreboot.org/27149 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 8de2413fcf..68246c695e 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -328,7 +328,16 @@ chip soc/intel/skylake
device i2c 50 on end
end
end # I2C #1
- device pci 15.2 on end # I2C #2
+ device pci 15.2 on
+ chip drivers/i2c/generic
+ register "hid" = ""SX9321""
+ register "name" = ""SEMTECH SX9321""
+ register "desc" = ""SAR Proximity Sensor""
+ register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A18_IRQ)"
+ register "device_present_gpio" = "GPP_B20"
+ device i2c 28 on end
+ end
+ end # I2C #2
device pci 15.3 on
chip drivers/i2c/hid
register "generic.hid" = ""ACPI0C50""