diff options
author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2021-06-04 15:58:40 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-01 09:41:12 +0000 |
commit | 58ff2acb7e1c5f49fef17eb782306ae610384314 (patch) | |
tree | 56c26ab51b0c1039d5a93c09b506f45353af9b9a /src/mainboard | |
parent | 856b579fe55696147ab3361e51a042efc4302518 (diff) |
mb/google/dedede/var/drawcia: Add LTE modem support for drawper
Add LTE modem to devicetree.
Configure GPIO control for LTE modem by fw_config.
Update LTE USB port configuration at run-time after probing FW_CONFIG.
By default the concerned USB port takes the Type-A port configuration.
BUG=b:186393848
TEST=Build image and check with command modem status
Change-Id: I20450ae37e5047dba67211316515994bd2a09600
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55181
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard')
5 files changed, 83 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/Makefile.inc index 04eb9a4877..c517214e46 100644 --- a/src/mainboard/google/dedede/variants/drawcia/Makefile.inc +++ b/src/mainboard/google/dedede/variants/drawcia/Makefile.inc @@ -1,4 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-or-later ramstage-y += gpio.c +ramstage-y += ramstage.c ramstage-$(CONFIG_FW_CONFIG) += variant.c + +smm-y += variant.c diff --git a/src/mainboard/google/dedede/variants/drawcia/gpio.c b/src/mainboard/google/dedede/variants/drawcia/gpio.c index 96b64cc4fe..955d9a051b 100644 --- a/src/mainboard/google/dedede/variants/drawcia/gpio.c +++ b/src/mainboard/google/dedede/variants/drawcia/gpio.c @@ -3,6 +3,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <boardid.h> +#include <bootstate.h> #include <fw_config.h> #include <ec/google/chromeec/ec.h> @@ -16,8 +17,27 @@ static const struct pad_config not_board6or8_gpio_table[] = { /* bid6: Pad configuration for board version 6 or 8 in ramstage*/ static const struct pad_config board6or8_gpio_table[] = { + /* A10 : WWAN_EN */ + PAD_CFG_GPO(GPP_A10, 1, PWROK), + + /* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL*/ + PAD_CFG_GPO(GPP_B7, 1, DEEP), + /* C12 : AP_PEN_DET_ODL has an external pull-up and hence no pad termination.*/ PAD_CFG_GPI_GPIO_DRIVER(GPP_C12, NONE, DEEP), + + /* D0 : WWAN_HOST_WAKE ==> WWAN_WDISABLE_L */ + PAD_CFG_GPO(GPP_D0, 1, DEEP), + + /* H0 : WWAN_PERST */ + PAD_CFG_GPO(GPP_H0, 0, PLTRST), +}; + +static const struct pad_config lte_disable_pads[] = { + PAD_NC(GPP_A10, NONE), + PAD_NC(GPP_B7, NONE), + PAD_NC(GPP_D0, NONE), + PAD_NC(GPP_H0, NONE), }; const struct pad_config *variant_override_gpio_table(size_t *num) @@ -32,3 +52,10 @@ const struct pad_config *variant_override_gpio_table(size_t *num) return not_board6or8_gpio_table; } + +static void fw_config_handle(void *unused) +{ + if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1A_HDMI_LTE))) + gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); +} +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 852af67461..175ed2211e 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -144,10 +144,30 @@ chip soc/intel/jasperlake chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi + register "desc" = ""Multi-use Port"" + register "type" = "UPC_TYPE_A" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device usb 2.3 on + probe DB_PORTS DB_PORTS_1A_HDMI + probe DB_PORTS DB_PORTS_1C_1A + probe DB_PORTS DB_PORTS_1A_HDMI_LTE + end + end + chip drivers/usb/acpi register "desc" = ""Camera"" register "type" = "UPC_TYPE_INTERNAL" device usb 2.5 on end end + chip drivers/usb/acpi + register "desc" = ""Multi-use Port"" + register "type" = "UPC_TYPE_USB3_A" + register "group" = "ACPI_PLD_GROUP(2, 2)" + device usb 3.3 on + probe DB_PORTS DB_PORTS_1A_HDMI + probe DB_PORTS DB_PORTS_1C_1A + probe DB_PORTS DB_PORTS_1A_HDMI_LTE + end + end end end end # USB xHCI diff --git a/src/mainboard/google/dedede/variants/drawcia/ramstage.c b/src/mainboard/google/dedede/variants/drawcia/ramstage.c new file mode 100644 index 0000000000..5acc033677 --- /dev/null +++ b/src/mainboard/google/dedede/variants/drawcia/ramstage.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> + +static struct acpi_gpio lte_reset_gpio = ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0); +static struct acpi_gpio lte_enable_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10); + +void variant_devtree_update(void) +{ + update_lte_device(<e_reset_gpio, <e_enable_gpio); +} diff --git a/src/mainboard/google/dedede/variants/drawcia/variant.c b/src/mainboard/google/dedede/variants/drawcia/variant.c index 3b62855a87..c557fe0a98 100644 --- a/src/mainboard/google/dedede/variants/drawcia/variant.c +++ b/src/mainboard/google/dedede/variants/drawcia/variant.c @@ -1,7 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <bootstate.h> +#include <acpi/acpi.h> +#include <baseboard/variants.h> +#include <delay.h> #include <drivers/intel/gma/opregion.h> #include <fw_config.h> +#include <gpio.h> #include <sar.h> const char *get_wifi_sar_cbfs_filename(void) @@ -20,3 +25,20 @@ const char *mainboard_vbt_filename(void) return "vbt.bin"; } + +static void power_off_lte_module(void) +{ + gpio_output(GPP_H0, 0); + mdelay(20); + gpio_output(GPP_A10, 0); +} + +void variant_smi_sleep(u8 slp_typ) +{ + /* + * Once the FW_CONFIG is provisioned, power off LTE module only under + * the situation where it is stuffed. + */ + if (slp_typ == ACPI_S5) + power_off_lte_module(); +} |