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author | Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> | 2021-08-03 03:49:10 -0700 |
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committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-05 15:55:00 +0000 |
commit | 2cdcc254c8d9fc9d08fd4e351872001efb894e2c (patch) | |
tree | b89bcde81ae0be71fd6a4997e111016dfebb2682 /src/mainboard | |
parent | 0834d86c1facccd8a5512ad1f2639cfb76175e23 (diff) |
mb/amd/majolica:Enable IOMMU Device for majolica
Enable IOMMU PCIe device.
BUG=b:194173037
TEST=lspci shows IOMMU device
00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Device 1631
Cq-Depend: chrome-internal:4027293,4027294
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: Ia84276ca98163158d818a0efc3e021b93ab365de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/amd/majolica/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/amd/majolica/devicetree.cb b/src/mainboard/amd/majolica/devicetree.cb index 5e9d971b9e..7bb0db1e33 100644 --- a/src/mainboard/amd/majolica/devicetree.cb +++ b/src/mainboard/amd/majolica/devicetree.cb @@ -24,6 +24,7 @@ chip soc/amd/cezanne register "pspp_policy" = "DXIO_PSPP_BALANCED" device domain 0 on + device ref iommu on end device ref gpp_gfx_bridge_0 on end # MXM device ref gpp_bridge_0 on end # NVMe device ref gpp_bridge_1 on end |