diff options
author | tongjian <tongjian@huaqin.corp-partner.google.com> | 2023-08-01 16:21:02 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-02 15:11:47 +0000 |
commit | 28857ce317b446a5bd7517dd0976b88354b05101 (patch) | |
tree | 0cc01ef13d3b18a9a09d38a2e6164bd1f5a3c931 /src/mainboard | |
parent | d97d860f232571aca755aca88ffa72d2f3fb87c8 (diff) |
mb/google/dedede/var/storo: Generate SPD ID for Samsung K4U6E3S4AB-MGCL
Add supported memory parts in the mem_parts_used.txt and generate the
SPD ID for Samsung K4U6E3S4AB-MGCL.
BUG=b:293240969
TEST=emerge-dedede coreboot
Change-Id: I92a1f2110e74b5d25572e0e86e04b5b32112c1f5
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76866
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard')
3 files changed, 5 insertions, 3 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc b/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc index 2f5ba21af9..95e640aa97 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/storo/memory/Makefile.inc @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/storo/memory src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/storo/memory src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, K4U6E3S4AB-MGCL SPD_SOURCES += spd/lp4x/set-1/spd-4.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:A SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 2(0b0010) Parts = H9HCNNNCPMMLXR-NEE diff --git a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt index e627949af8..1d288e1422 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/storo/memory/dram_id.generated.txt @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/storo/memory src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/storo/memory src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt DRAM Part Name ID to assign MT53E512M32D2NP-046 WT:E 0 (0000) @@ -9,3 +9,4 @@ H9HCNNNBKMMLXR-NEE 0 (0000) MT53E1G32D2NP-046 WT:A 1 (0001) H9HCNNNCPMMLXR-NEE 2 (0010) K4U6E3S4AA-MGCR 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) diff --git a/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt index 901ff7bc72..9223fcc565 100644 --- a/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/storo/memory/mem_parts_used.txt @@ -14,3 +14,4 @@ H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A H9HCNNNCPMMLXR-NEE K4U6E3S4AA-MGCR +K4U6E3S4AB-MGCL |