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authorThejaswani Putta <thejaswani.putta@intel.com>2021-07-07 17:48:54 -0700
committerWerner Zeh <werner.zeh@siemens.com>2021-07-12 04:24:43 +0000
commit250356c0c1db8f90c8d70543007f2699479f567e (patch)
tree47c3345dc08be8d736cbf24d452fb8fb95893896 /src/mainboard
parent07375cb3841f104d96eb94934c2987e887e2455b (diff)
mb/intel/adlrvp_m: Enable EC software sync
This patch enables CONFIG_VBOOT_EARLY_EC_SYNC. EC software sync will be performed in romstage. BUG=None BRANCH=None TEST=Verify EC software sync works on adlrvp_m Signed-off-by: Thejaswani Putta <thejaswani.putta@intel.com> Change-Id: I3a13094e5da2f672a6789fe86528de44e909045e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56154 Reviewed-by: Selma Bensaid <selma.bensaid@intel.com> Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 954c02e627..8ed37ab53a 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -27,7 +27,6 @@ config CHROMEOS
select GBB_FLAG_FORCE_MANUAL_RECOVERY
select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
select HAS_RECOVERY_MRC_CACHE
- select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
config MAINBOARD_DIR
string
@@ -96,6 +95,7 @@ config VBOOT
select VBOOT_LID_SWITCH
select VBOOT_MOCK_SECDATA
select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC
+ select VBOOT_EARLY_EC_SYNC if BOARD_INTEL_ADLRVP_M_EXT_EC
config UART_FOR_CONSOLE
int