diff options
author | Sean Rhodes <sean@starlabs.systems> | 2022-01-04 11:11:25 +0000 |
---|---|---|
committer | Martin Roth - Personal <martinroth@google.com> | 2022-02-22 19:21:36 +0000 |
commit | 16a55f7a5609f78b3480fae0908449f6f26dab25 (patch) | |
tree | d8abd1236fd2179c3c61ad803960c8bb4f349066 /src/mainboard | |
parent | 70a1ef071693af72061f5eef1ee24e56712c55a1 (diff) |
mb/starlabs/labtop: Reconfigure GPIOs
Reconfigure the GPIO's so that they are configured correctly.
The original configuration was based on the AMI firmware, and
whilst it worked, it wasn't optimal.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I27ecf066685f2a81ac884a9f276c518544449443
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/starlabs/labtop/variants/tgl/gpio.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c b/src/mainboard/starlabs/labtop/variants/tgl/gpio.c index 559de8d4d3..1ba1b817ef 100644 --- a/src/mainboard/starlabs/labtop/variants/tgl/gpio.c +++ b/src/mainboard/starlabs/labtop/variants/tgl/gpio.c @@ -26,29 +26,29 @@ const struct pad_config gpio_table[] = { /* REFERENCE: EP PER SCHEMATIC */ /* GPD0: PCH_BATLOW# */ - PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1), + PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* GPD1: AC_PRESENT */ - PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), + PAD_CFG_NF(GPD1, NONE, DEEP, NF1), /* GPD2: LAN_WAKE# */ PAD_NC(GPD2, NONE), /* GPD3: SIO_PWRBTN# */ - PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), + PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* GPD4: SIO_SLP_S3# */ - PAD_CFG_NF(GPD4, NONE, PWROK, NF1), + PAD_CFG_NF(GPD4, NONE, DEEP, NF1), /* GPD5: SIO_SLP_S4# */ - PAD_CFG_NF(GPD5, NONE, PWROK, NF1), + PAD_CFG_NF(GPD5, NONE, DEEP, NF1), /* GPD6: SIO_SLP_A# */ - PAD_CFG_NF(GPD6, NONE, PWROK, NF1), + PAD_CFG_NF(GPD6, NONE, DEEP, NF1), /* GPD7: PCH_TBT_PERST# */ - PAD_CFG_GPO(GPD7, 0, PWROK), + PAD_CFG_GPO(GPD7, 0, PLTRST), /* GPD8: SUSCLK */ - PAD_CFG_NF(GPD8, NONE, PWROK, NF1), + PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* GPD9: SIO_SLP_WLAN# */ - PAD_CFG_NF(GPD9, NONE, PWROK, NF1), + PAD_CFG_NF(GPD9, NONE, DEEP, NF1), /* GPD10: SIO_SLP_S5# */ - PAD_CFG_NF(GPD10, NONE, PWROK, NF1), + PAD_CFG_NF(GPD10, NONE, DEEP, NF1), /* GPD11: PM_LANPHY_EN */ - PAD_CFG_GPO(GPD11, 0, PWROK), + PAD_CFG_NF(GPD11, NONE, DEEP, NF1), /* A0: ESPI_IO_0 */ /* A1: ESPI_IO_1 */ @@ -62,7 +62,7 @@ const struct pad_config gpio_table[] = { /* A8: WLAN_PCM_RST */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2), /* A9: WLAN_PCM_CLKREQ0 */ - PAD_CFG_NF(GPP_A9, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_A9, NONE, DEEP, NF2), /* A10: WLAN_PCM_IN */ PAD_NC(GPP_A10, NONE), /* A11: M2_CPU_SSD_RST_N */ @@ -115,7 +115,7 @@ const struct pad_config gpio_table[] = { /* B10: PWR_MON_I2C_SCL_R */ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* B11: I2C_PMC_PD_INT_N */ - PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1), + PAD_CFG_NF(GPP_B11, NONE, DEEP, NF1), /* B12: PM_SLP_S0_N */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* B13: PLT_RST_N */ |