diff options
| author | Weimin Wu <wuweimin@huaqin.corp-partner.google.com> | 2023-12-06 23:48:04 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-14 13:06:13 +0000 |
| commit | 133e3ee6610e1a2bac19557119f00a736d12baeb (patch) | |
| tree | 7894b4f1705c8c2f800e5f8394398ef7cd9d919b /src/mainboard | |
| parent | 020d4b605e60664dcb06208df91c69a17ac42319 (diff) | |
mb/google/nissa/var/anraggar: Change code style for register usb2_ports
Change code style to be compatible with Nissa's format:
register "option" = "{
[0] = value /* comment */
...
}"
to
register "option[0]" = "value" /* comment */
BUG=none
TEST=abuild -v -a -x -c max -p none -t google/brya -b anraggar
Change-Id: I60659bd44813173f9b984216473a0919c5f331b8
Signed-off-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/anraggar/overridetree.cb | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index 0983257867..bc31532732 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -408,16 +408,14 @@ chip soc/intel/alderlake end end device ref xhci on - register "usb2_ports" = "{ - [0] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C MB (7.5 inch) */ - [1] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C DB (7.1 inch) */ - [2] = USB2_PORT_MID(OC_SKIP), /* Type-A MB (6.4 inch) */ - [3] = USB2_PORT_MID(OC_SKIP), /* Type-A DB (6.2 inch) */ - [4] = USB2_PORT_SHORT(OC_SKIP), /* LTE (3.3 inch) */ - [5] = USB2_PORT_SHORT(OC_SKIP), /* UFC (3.7 inch) */ - [7] = USB2_PORT_SHORT(OC_SKIP), /* Bluetooth port for PCIe WLAN (2.5 inch) */ - [9] = USB2_PORT_SHORT(OC_SKIP), /* Bluetooth port for CNVi WLAN */ - }" + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C MB (7.5 inch) + register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C DB (7.1 inch) + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MB (6.4 inch) + register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A DB (6.2 inch) + register "usb2_ports[4]" = "USB2_PORT_SHORT(OC_SKIP)" # LTE (3.3 inch) + register "usb2_ports[5]" = "USB2_PORT_SHORT(OC_SKIP)" # UFC (3.7 inch) + register "usb2_ports[7]" = "USB2_PORT_SHORT(OC_SKIP)" # Bluetooth port for PCIe WLAN (2.5 inch) + register "usb2_ports[9]" = "USB2_PORT_SHORT(OC_SKIP)" # Bluetooth port for CNVi WLAN chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi |