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authorYu-Ping Wu <yupingso@chromium.org>2021-05-21 14:55:01 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-05-26 12:30:29 +0000
commit0ed04569d7eea07f6649a9bb379d7af0e97bce25 (patch)
tree595af48848eb11d71ef7a37a000487e30dbd407a /src/mainboard
parentb46a9e5ddb3543cbbcfd4b22c3b001e7c7fc73e8 (diff)
mb/google/asurada: Allow payloads to enable USB VBUS
Configure GPIO CAM_PDN5 (AP_XHCI_INIT_DONE) as output, so that payloads (for example depthcharge) can assert it to notify EC to enable USB VBUS. BUG=b:187149602 TEST=emerge-asurada coreboot BRANCH=asurada Change-Id: I3bf63f91b8057e35be2780024a8b398c3044729b Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54902 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/asurada/chromeos.c1
-rw-r--r--src/mainboard/google/asurada/gpio.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/asurada/chromeos.c b/src/mainboard/google/asurada/chromeos.c
index 56a1084e81..6f8f24281a 100644
--- a/src/mainboard/google/asurada/chromeos.c
+++ b/src/mainboard/google/asurada/chromeos.c
@@ -16,6 +16,7 @@ void setup_chromeos_gpios(void)
gpio_input_pullup(GPIO_SD_CD);
gpio_output(GPIO_RESET, 0);
gpio_output(GPIO_EN_SPK_AMP, 0);
+ gpio_output(GPIO_XHCI_DONE, 0);
}
void fill_lb_gpios(struct lb_gpios *gpios)
diff --git a/src/mainboard/google/asurada/gpio.h b/src/mainboard/google/asurada/gpio.h
index ae34d33313..8c33d9c531 100644
--- a/src/mainboard/google/asurada/gpio.h
+++ b/src/mainboard/google/asurada/gpio.h
@@ -16,6 +16,8 @@
#define GPIO_RESET GPIO(CAM_PDN2)
/* EN_SPK */
#define GPIO_EN_SPK_AMP GPIO(CAM_PDN1)
+/* AP_XHCI_INIT_DONE */
+#define GPIO_XHCI_DONE GPIO(CAM_PDN5)
void setup_chromeos_gpios(void);