diff options
| author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-04-06 19:26:50 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-11 13:58:26 +0000 |
| commit | 044883615d4471b7a0b883eb8b8224d95faf52af (patch) | |
| tree | a54bcb1aadb888ab998714bbcb69c4ca5bd6de0c /src/mainboard | |
| parent | ff69b6f4d59ebc2917d462ade5eab3e2a0d69509 (diff) | |
mb/prodrive/atlas: Update correct SPD address
Update the SPD address as Atlas is using DIMM 0 & 1 in memory
controller 1 channel 1.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Icefcd23b57a7f97e1ee25fed20b35d0e2cb51145
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/prodrive/atlas/romstage_fsp_params.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c index bd4c0a3c2b..8aaef5bdfd 100644 --- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c +++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c @@ -35,11 +35,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) const struct mem_spd dimm_module_spd_info = { .topo = MEM_TOPO_DIMM_MODULE, .smbus = { - [0] = { - .addr_dimm[0] = 0x50, - .addr_dimm[1] = 0x51, - }, - [1] = { + [3] = { .addr_dimm[0] = 0x52, .addr_dimm[1] = 0x53, }, |