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authorJimmy Zhang <jimmzhang@nvidia.com>2014-12-09 15:20:20 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-13 17:04:14 +0200
commitd4dff621756486d9cde20a1a27f656dd37e3494f (patch)
tree82435e5dbf7080877a5afe2073992bf556b6b333 /src/mainboard
parente3a14326ee5e8104761b221b79415759bc662f70 (diff)
ryu: display: Split dc functions from dsi display code
dc supporting functions can be used for other than dsi display interfaces. This change is preparing for supporting sor display interface. BUG=chrome-os-partner:34336 BRANCH=none TEST=build ryu and test dev/rec mode, also build rush ok Change-Id: I8a310e188fae70d7726c4360894b392c4546e105 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: a7ab7225e3419a0fd93894dbb9a959390f29945b Original-Change-Id: Id14cbd89457cb91c23526927a432f4eb7cc6291b Original-Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/234270 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9583 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/rush_ryu/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/rush_ryu/devicetree.cb b/src/mainboard/google/rush_ryu/devicetree.cb
index b5c998192f..f621e006d8 100644
--- a/src/mainboard/google/rush_ryu/devicetree.cb
+++ b/src/mainboard/google/rush_ryu/devicetree.cb
@@ -50,4 +50,6 @@ chip soc/nvidia/tegra132
# kernel driver
register "pixel_clock" = "301620000"
+
+ register "win_opt" = "DSI_ENABLE"
end