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authorArthur Heymans <arthur@aheymans.xyz>2019-10-27 07:13:55 +0100
committerNico Huber <nico.h@gmx.de>2019-11-14 20:58:43 +0000
commitd3c58fdc6436b2c4455b07fe764fcae471a65433 (patch)
treeba640e7839435bea341bf796a2e63921594a72de /src/mainboard
parent211792feaba4a5cc26b4e3f17e905c3e899eb07f (diff)
soc/qualcomm: Link cbmem.c only in romstage
Change-Id: I008fcca024fecf462c4b550b8dedbf4b06e491b8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36368 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/gale/mmu.c3
-rw-r--r--src/mainboard/google/storm/mmu.c7
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/gale/mmu.c b/src/mainboard/google/gale/mmu.c
index bf46f7a0d9..7ac8b9207a 100644
--- a/src/mainboard/google/gale/mmu.c
+++ b/src/mainboard/google/gale/mmu.c
@@ -38,7 +38,8 @@ void setup_dram_mappings(enum dram_state dram)
/* Map DMA memory */
mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
/* Mark cbmem backing store as ready. */
- ipq_cbmem_backing_store_ready();
+ if (ENV_ROMSTAGE)
+ ipq_cbmem_backing_store_ready();
} else {
mmu_disable_range(DRAM_START, DRAM_SIZE);
/* Map DMA memory */
diff --git a/src/mainboard/google/storm/mmu.c b/src/mainboard/google/storm/mmu.c
index 9750cc16e8..3f1515ab06 100644
--- a/src/mainboard/google/storm/mmu.c
+++ b/src/mainboard/google/storm/mmu.c
@@ -35,10 +35,9 @@ void setup_dram_mappings(enum dram_state dram)
mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
/* Map DMA memory */
mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
-#if ENV_ROMSTAGE
- /* Mark cbmem backing store as ready. */
- ipq_cbmem_backing_store_ready();
-#endif
+ if (ENV_ROMSTAGE)
+ /* Mark cbmem backing store as ready. */
+ ipq_cbmem_backing_store_ready();
} else {
mmu_disable_range(DRAM_START, DRAM_SIZE);
/* Map DMA memory */