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authorStefan Reinauer <stepan@openbios.org>2005-08-06 22:37:26 +0000
committerStefan Reinauer <stepan@openbios.org>2005-08-06 22:37:26 +0000
commitce8cba4d046492e5423e4d247045bec206b63716 (patch)
tree06089e461e4afc80eff80ffc75fd37e8dca69050 /src/mainboard
parent0c6c07348f0ce1438e2dddb3a7821fa7bd932bfe (diff)
reclone ts5300 from digitallogic sc520 board
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/technologic/ts5300/Config.lb38
-rw-r--r--src/mainboard/technologic/ts5300/auto.c151
-rw-r--r--src/mainboard/technologic/ts5300/chip.h4
-rw-r--r--src/mainboard/technologic/ts5300/mainboard.c2
4 files changed, 169 insertions, 26 deletions
diff --git a/src/mainboard/technologic/ts5300/Config.lb b/src/mainboard/technologic/ts5300/Config.lb
index 665a23aa0a..04cc7f2d7b 100644
--- a/src/mainboard/technologic/ts5300/Config.lb
+++ b/src/mainboard/technologic/ts5300/Config.lb
@@ -2,8 +2,10 @@
## Compute the location and size of where this firmware image
## (linuxBIOS plus bootloader) will live in the boot rom chip.
##
+default ROM_SIZE = 512 * 1024
+default FALLBACK_SIZE = 0x10000
if USE_FALLBACK_IMAGE
- default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_SIZE = 64 * 1024 # FALLBACK_SIZE
default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
else
default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
@@ -14,8 +16,8 @@ end
## Compute the start location and size size of
## The linuxBIOS bootloader.
##
-default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
##
## Compute where this copy of linuxBIOS will start in the boot rom
@@ -29,7 +31,7 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
## XIP_ROM_SIZE must be a power of 2.
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
##
-default XIP_ROM_SIZE=65536
+default XIP_ROM_SIZE=32*1024
default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
##
@@ -44,7 +46,7 @@ arch i386 end
driver mainboard.o
if HAVE_PIRQ_TABLE object irq_tables.o end
-#object reset.o
+object reset.o
##
## Romcc output
@@ -61,11 +63,11 @@ end
makerule ./auto.E
depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
- action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+ action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
makerule ./auto.inc
depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
- action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+ action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
end
##
@@ -114,9 +116,7 @@ end
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-mainboardinit cpu/x86/mmx/enable_mmx.inc
mainboardinit ./auto.inc
-mainboardinit cpu/x86/mmx/disable_mmx.inc
##
## Include the secondary Configuration files
@@ -124,19 +124,11 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc
dir /pc80
config chip.h
-chip northbridge/amd/sc520
- device pci_domain 0 on
- device pci 0.0 on
-#chip southbridge/amd/sc520
-# register "enable_usb" = "0"
-# register "enable_native_ide" = "1"
-# register "enable_com_ports" = "1"
-# register "enable_keyboard" = "0"
-# register "enable_nvram" = "1"
-# end
- end
- chip cpu/amd/sc520
- end
- end
+chip cpu/amd/sc520
+ device pci_domain 0 on
+ device pci 0.0 on end
+ device pci 1.0 on end
+# register "com1" = "{1}"
+# register "com1" = "{1, 0, 0x3f8, 4}"
+ end
end
-
diff --git a/src/mainboard/technologic/ts5300/auto.c b/src/mainboard/technologic/ts5300/auto.c
new file mode 100644
index 0000000000..1ffc7ae415
--- /dev/null
+++ b/src/mainboard/technologic/ts5300/auto.c
@@ -0,0 +1,151 @@
+#define ASSEMBLY 1
+#define ASM_CONSOLE_LOGLEVEL 8
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/mc146818rtc_early.c"
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "cpu/x86/bist.h"
+//#include "lib/delay.c"
+#include "cpu/amd/sc520/raminit.c"
+
+struct mem_controller {
+ int i;
+};
+
+static void hard_reset(void)
+{
+}
+
+static void memreset_setup(void)
+{
+}
+
+static void memreset(int controllers, const struct mem_controller *ctrl)
+{
+}
+
+static inline void activate_spd_rom(const struct mem_controller *ctrl)
+{
+ /* nothing to do */
+}
+
+static inline int spd_read_byte(unsigned device, unsigned address)
+{
+// return smbus_read_byte(device, address);
+}
+
+//#include "sdram/generic_sdram.c"
+
+static inline void dumpmem(void){
+ int i, j;
+ unsigned char *l;
+ unsigned char c;
+
+ for(i = 0x4000; i < 0x5000; i += 16) {
+ print_err_hex32(i); print_err(":");
+ for(j = 0; j < 16; j++) {
+ l = (unsigned char *)i + j;
+ c = *l;
+ print_err_hex8(c);
+ print_err(" ");
+ }
+ print_err("\r\n");
+ }
+}
+
+static void main(unsigned long bist)
+{
+ volatile int i;
+ for(i = 0; i < 100; i++)
+ ;
+
+
+ setupsc520();
+ uart_init();
+ console_init();
+ for(i = 0; i < 100; i++)
+ print_err("fill usart\r\n");
+ // while(1)
+ print_err("HI THERE!\r\n");
+ // sizemem();
+ staticmem();
+ print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60);
+ print_err("\n");
+
+ // while(1)
+ print_err("STATIC MEM DONE\r\n");
+ outb(0xee, 0x80);
+ print_err("loop forever ...\n");
+
+
+#if 0
+
+ /* clear memory 1meg */
+ __asm__ volatile(
+ "1: \n\t"
+ "movl %0, %%fs:(%1)\n\t"
+ "addl $4,%1\n\t"
+ "subl $4,%2\n\t"
+ "jnz 1b\n\t"
+ :
+ : "a" (0), "D" (0), "c" (1024*1024)
+ );
+
+
+#endif
+
+#if 0
+ dump_pci_devices();
+#endif
+#if 0
+ dump_pci_device(PCI_DEV(0, 0, 0));
+#endif
+
+#if 0
+ print_err("RAM CHECK!\r\n");
+ // Check 16MB of memory @ 0
+ ram_check(0x00000000, 0x01000000);
+#endif
+#if 0
+ print_err("RAM CHECK for 32 MB!\r\n");
+ // Check 32MB of memory @ 0
+ ram_check(0x00000000, 0x02000000);
+#endif
+#if 0
+ {
+ volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x70000;
+ volatile unsigned char *dst = (unsigned char *) 0x4000;
+ for(i = 0; i < 0x10000; i++) {
+ /*
+ print_err("Set dst "); print_err_hex32((unsigned long) dst);
+ print_err(" to "); print_err_hex32(*src); print_err("\r\n");
+ */
+ *dst = *src;
+ //print_err(" dst is now "); print_err_hex32(*dst); print_err("\r\n");
+ dst++, src++;
+ outb((unsigned char)i, 0x80);
+ }
+ }
+ dumpmem();
+ outb(0, 0x80);
+ print_err("loop forever\r\n");
+ outb(0xdd, 0x80);
+ __asm__ volatile(
+ "movl %0, %%edi\n\t"
+ "jmp *%%edi\n\t"
+ :
+ : "a" (0x4000)
+ );
+
+ print_err("FUCK\r\n");
+
+ while(1);
+#endif
+}
+
diff --git a/src/mainboard/technologic/ts5300/chip.h b/src/mainboard/technologic/ts5300/chip.h
index a57e508e11..d81199ea7e 100644
--- a/src/mainboard/technologic/ts5300/chip.h
+++ b/src/mainboard/technologic/ts5300/chip.h
@@ -1,5 +1,5 @@
-extern struct chip_operations mainboard_technologic_ts5300_control;
+extern struct chip_operations mainboard_technologic_ts5300_ops;
struct mainboard_technologic_ts5300_config {
- int nothing;
+
};
diff --git a/src/mainboard/technologic/ts5300/mainboard.c b/src/mainboard/technologic/ts5300/mainboard.c
index e28f9715b8..6595c4b979 100644
--- a/src/mainboard/technologic/ts5300/mainboard.c
+++ b/src/mainboard/technologic/ts5300/mainboard.c
@@ -5,7 +5,7 @@
#include <device/pci_ops.h>
#include "chip.h"
-struct chip_operations mainboard_technologic_ts5300_control = {
+struct chip_operations mainboard_technologic_ts5300_ops = {
CHIP_NAME("Technologic Systems TS5300 mainboard ")
};