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authorFurquan Shaikh <furquan@chromium.org>2017-08-17 22:14:28 -0700
committerFurquan Shaikh <furquan@google.com>2017-08-21 04:39:57 +0000
commitb15769186c7767d6408e9a524eed09978db3fa60 (patch)
treed8e382f3b016a55dfa6ffc7ec5e89eda833a5c63 /src/mainboard
parent345567279722fc2391a54f263a2d0e494e3bb759 (diff)
mainboard/google/poppy: Remove MPS IMPV8 workaround
Poppy uses MPS2949 IMVP8 controller and does not need the VR workaround similar to Eve. Change-Id: If6fb1890e024e1488d278bbe0a71a1a63ee321af Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/21104 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index f10db59bb0..9d5b5b0b0f 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -60,7 +60,6 @@ chip soc/intel/skylake
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
- register "SendVrMbxCmd" = "1" # IMVP8 workaround
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"