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authorOskar Enoksson <enok@lysator.liu.se>2011-10-04 22:34:11 +0200
committerMarc Jones <marcj303@gmail.com>2011-10-17 09:44:56 +0200
commita9a8b801911ec7ebd1163c757bcec2635af5a641 (patch)
treeea61767890a87779171c59dc4c1a3e97ba1323fc /src/mainboard
parente2c05da300037e6d92bbb833f945ab05421978e5 (diff)
Re-worked devicetree.cb for DL145 G1
After a lot of experimentation this commit improves some hardware features that were not recognized or incorrectly configured before. The only thing not tested is SCSI-option board (I dont have one). Misleading errors in comments have been corrected. (Note BTW that the DL145 G1 mainboard is identical to AMD Serenade which was supported in early versions of coreboot but was dropped for some reason.) Signed-off-by: Oskar Enoksson <enok@lysator.liu.se> Change-Id: Ibbd97fafad22196b1e18d0b257731490339f113e Reviewed-on: http://review.coreboot.org/237 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/hp/dl145_g1/devicetree.cb121
1 files changed, 52 insertions, 69 deletions
diff --git a/src/mainboard/hp/dl145_g1/devicetree.cb b/src/mainboard/hp/dl145_g1/devicetree.cb
index 3237723a53..bd67f23d54 100644
--- a/src/mainboard/hp/dl145_g1/devicetree.cb
+++ b/src/mainboard/hp/dl145_g1/devicetree.cb
@@ -12,45 +12,46 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.0 on # link 2
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
- device pci 0.0 on end
- device pci 0.1 on end
- device pci 1.0 on end
- device pci 1.1 on end
- device pci 2.0 on end
- device pci 2.1 on end
- device pci 3.0 off end
+ device pci 0.0 on # PCIX Bridge A
+ # PCI-X expansion slot cards auto-detected here
+ end
+ device pci 0.1 on end # IOAPIC A
+ device pci 1.0 on # PCIX Bridge B
+ # On-board BCM5704 dual port ethernet chip auto-detected here
+ # Optional SCSI board also (?)
+ end
+ device pci 1.1 on end # IOAPIC B
+ device pci 2.0 off end
end
chip southbridge/amd/amd8111
- # this "device pci 0.0" is the parent the next one
+ # this "device pci 0.0" is the parent of the next one
# PCI bridge
device pci 0.0 on
- device pci 0.0 on end # LPC
- device pci 0.1 on end # IDE
- device pci 0.2 on end # SMbus
- device pci 0.3 on end # ACPI
- device pci 1.0 off end
- #device pci 5.0 on end # SiI
- #device pci 6.0 on end
+ device pci 0.0 on end # OHCI-based USB controller 0
+ device pci 0.1 on end # OCHI-based USB controller 1
+ device pci 0.2 on end # EHCI-based USB2 controller
+ device pci 1.0 off end # LAN Ethernet controller
+ #device pci 4.0 on end # VGA PCI-card (auto detected)
end
- device pci 1.0 on
+ device pci 1.0 on # LPC Bridge
chip superio/winbond/w83627hf
device pnp 2e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
+ #io 0x60 = 0x3f0
+ #irq 0x70 = 6
+ #drq 0x74 = 2
end
device pnp 2e.1 off # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- drq 0x74 = 1
+ #io 0x60 = 0x378
+ #irq 0x70 = 7
+ #drq 0x74 = 1
end
device pnp 2e.2 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
- device pnp 2e.3 on # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
+ device pnp 2e.3 off # Com2
+ #io 0x60 = 0x2f8
+ #irq 0x70 = 3
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
@@ -60,12 +61,12 @@ chip northbridge/amd/amdk8/root_complex
end
device pnp 2e.6 off # CIR
end
- device pnp 2e.7 off # GAM_MIDI_GIPO1
- io 0x60 = 0x201
- io 0x62 = 0x330
- irq 0x70 = 9
+ device pnp 2e.7 off # GAM_MIDI_GPIO1
+ #io 0x60 = 0x201
+ #io 0x62 = 0x330
+ #irq 0x70 = 9
end
- device pnp 2e.8 on # GPIO2
+ device pnp 2e.8 on # GPIO2 (watchdog timer)
end
device pnp 2e.9 on # GPIO3
end
@@ -77,28 +78,18 @@ chip northbridge/amd/amdk8/root_complex
end
end
end
- device pci 1.1 on end
- device pci 1.2 on end
- device pci 1.3 on
- chip drivers/generic/generic # ???
- device i2c 08 on end
+ device pci 1.1 on end # EIDE controller
+ device pci 1.2 on
+ chip drivers/generic/generic
+ device i2c 8 on end # Some HW-monitor/sensor?
end
- chip drivers/i2c/i2cmux # pca9556 smbus mux
- device i2c 18 on #0 pca9516 1
- # I don't know what 30-33 are for,
- # they seem to have something to do with the DIMM's
- chip drivers/generic/generic # ???
- device i2c 30 on end
- end
- chip drivers/generic/generic # ???
- device i2c 31 on end
- end
- chip drivers/generic/generic # ???
- device i2c 32 on end
- end
- chip drivers/generic/generic # ???
- device i2c 33 on end
- end
+ end
+ device pci 1.2 on
+ chip drivers/i2c/i2cmux # Multplexed DIMM spd eeproms.
+ device i2c 18 on #0 pca9516 (?)
+ # Some dimms also listen to address 30-33
+ # It's some kind of write-protect function
+ # The 50-53 addresses are the interesting ones.
chip drivers/generic/generic #dimm H0-0
device i2c 50 on end
end
@@ -112,19 +103,7 @@ chip northbridge/amd/amdk8/root_complex
device i2c 53 on end
end
end
- device i2c 18 on #1 pca9516 2
- chip drivers/generic/generic # ???
- device i2c 30 on end
- end
- chip drivers/generic/generic # ???
- device i2c 31 on end
- end
- chip drivers/generic/generic # ???
- device i2c 32 on end
- end
- chip drivers/generic/generic # ???
- device i2c 33 on end
- end
+ device i2c 18 on #1 pca9516 (?)
chip drivers/generic/generic #dimm H1-0
device i2c 50 on end
end
@@ -139,13 +118,17 @@ chip northbridge/amd/amdk8/root_complex
end
end
end
- chip drivers/generic/generic # ???
- device i2c 69 on end
+ end
+ device pci 1.2 on
+ chip drivers/generic/generic
+ device i2c 69 on end # Texas Instruments cdc960 clock synthesizer
end
- end # acpi
- device pci 1.4 off end
+ end # SMBus 2.0 controller
+ device pci 1.3 on # System management registers (ACPI)
+ end # System management
+ #device pci 1.4 off end
device pci 1.5 off end # AC97 Audio
- device pci 1.6 off end # MC97 Modem
+ device pci 1.6 off end # AC97 Modem
register "ide0_enable" = "1"
register "ide1_enable" = "1"
end