diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 05:28:38 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-19 00:03:37 +0000 |
| commit | 9c5a9bba8e58e2af4af7e36ae22d00a11cfd532d (patch) | |
| tree | 5bfac184634bf0fcb4b78dd7be2f8ac99dbb7203 /src/mainboard | |
| parent | 157b189f6b97b6e9ecd8d29edbbd045fbbc231f5 (diff) | |
mainboard/google: Remove use of __PRE_RAM__
Change-Id: I2ebeb393e4a5a4bfac8a37a877d067aca484ca2e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/auron/chromeos.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/link/chromeos.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/rambi/chromeos.c | 5 | ||||
| -rw-r--r-- | src/mainboard/google/slippy/chromeos.c | 5 | ||||
| -rw-r--r-- | src/mainboard/intel/wtm2/chromeos.c | 5 |
5 files changed, 5 insertions, 20 deletions
diff --git a/src/mainboard/google/auron/chromeos.c b/src/mainboard/google/auron/chromeos.c index 0147a317fe..c82e37d635 100644 --- a/src/mainboard/google/auron/chromeos.c +++ b/src/mainboard/google/auron/chromeos.c @@ -13,15 +13,13 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/gpio.h> /* SPI Write protect is GPIO 16 */ #define CROS_WP_GPIO 58 -#ifndef __PRE_RAM__ -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -33,7 +31,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_write_protect_state(void) { diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c index ecd7592823..a5370beddb 100644 --- a/src/mainboard/google/link/chromeos.c +++ b/src/mainboard/google/link/chromeos.c @@ -15,13 +15,11 @@ #include <string.h> #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#ifndef __PRE_RAM__ -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -41,7 +39,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_write_protect_state(void) { diff --git a/src/mainboard/google/rambi/chromeos.c b/src/mainboard/google/rambi/chromeos.c index 7880154586..859fb0bc6f 100644 --- a/src/mainboard/google/rambi/chromeos.c +++ b/src/mainboard/google/rambi/chromeos.c @@ -14,15 +14,13 @@ */ #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <soc/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> /* The WP status pin lives on GPIO_SSUS_6 which is pad 36 in the SUS well. */ #define WP_STATUS_PAD 36 -#ifndef __PRE_RAM__ -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -33,7 +31,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_write_protect_state(void) { diff --git a/src/mainboard/google/slippy/chromeos.c b/src/mainboard/google/slippy/chromeos.c index f52bace271..772b5a874b 100644 --- a/src/mainboard/google/slippy/chromeos.c +++ b/src/mainboard/google/slippy/chromeos.c @@ -14,13 +14,11 @@ */ #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <southbridge/intel/lynxpoint/pch.h> #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#ifndef __PRE_RAM__ -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -31,7 +29,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_write_protect_state(void) { diff --git a/src/mainboard/intel/wtm2/chromeos.c b/src/mainboard/intel/wtm2/chromeos.c index 802221446d..556677acb6 100644 --- a/src/mainboard/intel/wtm2/chromeos.c +++ b/src/mainboard/intel/wtm2/chromeos.c @@ -14,6 +14,7 @@ */ #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <device/device.h> #include <device/pci.h> #include <soc/gpio.h> @@ -22,9 +23,6 @@ /* Compile-time settings for recovery mode. */ #define REC_MODE_SETTING 0 -#ifndef __PRE_RAM__ -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -35,7 +33,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_recovery_mode_switch(void) { |