diff options
| author | Martin Roth <martinroth@google.com> | 2019-06-10 09:35:23 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-06-11 22:16:35 +0000 |
| commit | 87dcd0061af48752469a77824715101180ab259e (patch) | |
| tree | 5afb739a2d993e630dca14da671f6e2b53816d13 /src/mainboard | |
| parent | deb99af8a1bff0ca66cf5764570d5f8e2033039b (diff) | |
mainboard/google/kahlee: Reduce VRAM to 16MB
It was determined through testing that 16MB of reserved VRAM is
sufficient. Additional RAM for the graphics driver is allocated out
of system memory.
BUG=b:123579702
TEST=Boot Grunt, watch VRAM usage with graphics driver logging.
Change-Id: I44b640f015b45c0dc3d701929549f3a1082a9268
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33368
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb index c55bb8bdb4..3dc2c2aabc 100644 --- a/src/mainboard/google/kahlee/variants/aleena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/devicetree.cb @@ -19,7 +19,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" + register "uma_size" = "16 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index 5124e41dab..635b23735c 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -19,7 +19,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" + register "uma_size" = "16 * MiB" register "stapm_percent" = "68" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index b37e1bf0ac..d73c47c6b8 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -19,7 +19,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" + register "uma_size" = "16 * MiB" register "stapm_percent" = "80" register "stapm_time_ms" = "2500000" register "stapm_power_mw" = "7800" diff --git a/src/mainboard/google/kahlee/variants/liara/devicetree.cb b/src/mainboard/google/kahlee/variants/liara/devicetree.cb index a929c46704..30028275c8 100644 --- a/src/mainboard/google/kahlee/variants/liara/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/liara/devicetree.cb @@ -19,7 +19,7 @@ chip soc/amd/stoneyridge }" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" - register "uma_size" = "32 * MiB" + register "uma_size" = "16 * MiB" register "lvds_poseq_varybl_to_blon" = "0x5" # in 4ms register "lvds_poseq_blon_to_varybl" = "0x5" # in 4ms |