diff options
author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-27 18:03:18 +0000 |
---|---|---|
committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-27 18:03:18 +0000 |
commit | 7ac4c26177713cf2b1ada8c8d377929aedd109e4 (patch) | |
tree | ebd432fa8c255c5fa349eb153fdf0a6d9acfabf9 /src/mainboard | |
parent | 5211a7023e90580505acc4eda855206540f588c7 (diff) |
Add a kconfig option to allow the user to select a specific physical
USB port for use as Debug Port (on chipsets which support that).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/gigabyte/m57sli/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/msi/ms7260/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/msi/ms9652_fam10/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/nvidia/l1_2pvv/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912/romstage.c | 4 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 4 |
7 files changed, 7 insertions, 21 deletions
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index e4762bfd09..cf5c6bda26 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -40,8 +40,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -196,7 +194,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - sis966_enable_usbdebug(DBGP_DEFAULT); + sis966_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif console_init(); diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index e37d81e8a0..be5e46ba1a 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -38,8 +38,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -212,7 +210,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif console_init(); diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 1f0738fb69..908138a5d3 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -42,8 +42,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -181,7 +179,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) uart_init(); report_bist_failure(bist); /* Halt upon BIST failure. */ #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif console_init(); diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 4b7fe8f1c7..2c448bd204 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -33,8 +33,6 @@ #define SET_FIDVID 1 #define SET_FIDVID_CORE_RANGE 0 -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -185,7 +183,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index dfdc57c742..bdc6810086 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -38,8 +38,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -198,7 +196,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif console_init(); diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 6548f77e62..695d2cbe8a 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -38,8 +38,6 @@ #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0 #endif -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -192,7 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif console_init(); diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 5792d34af7..ed79299e8c 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -33,8 +33,6 @@ #define SET_FIDVID 1 #define SET_FIDVID_CORE_RANGE 0 -#define DBGP_DEFAULT 7 - #include <stdint.h> #include <string.h> #include <device/pci_def.h> @@ -180,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); #if CONFIG_USBDEBUG - mcp55_enable_usbdebug(DBGP_DEFAULT); + mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif |