diff options
author | Johnny Lin <johnny_lin@wiwynn.com> | 2021-01-08 15:24:25 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-01 08:47:48 +0000 |
commit | 3acea5c51abd09bb578cfb35952b9dbd96be21fe (patch) | |
tree | 9b7536e003e98cd200b18ef3ae7010087131172d /src/mainboard | |
parent | 86846439113a370b0eab341b50dcd4cf1679b7ec (diff) |
ipmi/ocp: Move common OCP/Facebook IPMI OEM codes into drivers/ipmi/ocp
1. These are common OCP/Facebook IPMI OEM commands, move from mainboard
into drivers/ipmi/ocp to avoid code duplication and provide better
reusability.
2. OCP Tioga Pass enables IPMI_OCP driver.
Tested=On OCP Delta Lake and Tioga Pass verify the commands still work
correctly.
Change-Id: Idd116a89239273fd5cc7b06c7768146085a3ed69
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/ocp/deltalake/ipmi.c | 90 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/ipmi.h | 34 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/ramstage.c | 7 | ||||
-rw-r--r-- | src/mainboard/ocp/deltalake/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/Kconfig | 1 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/devicetree.cb | 3 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/ipmi.c | 18 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/ipmi.h | 12 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/ramstage.c | 10 | ||||
-rw-r--r-- | src/mainboard/ocp/tiogapass/romstage.c | 5 |
10 files changed, 14 insertions, 167 deletions
diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c index 7adbcf2444..90222157e3 100644 --- a/src/mainboard/ocp/deltalake/ipmi.c +++ b/src/mainboard/ocp/deltalake/ipmi.c @@ -3,30 +3,13 @@ #include <console/console.h> #include <drivers/ipmi/ipmi_kcs.h> #include <drivers/ipmi/ipmi_ops.h> +#include <drivers/ipmi/ocp/ipmi_ocp.h> #include <drivers/vpd/vpd.h> #include <string.h> #include "ipmi.h" #include "vpd.h" -enum cb_err ipmi_set_ppin(struct ppin_req *req) -{ - int ret; - struct ipmi_rsp rsp; - - ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN, - (const unsigned char *) req, sizeof(*req), - (unsigned char *) &rsp, sizeof(rsp)); - - if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) { - printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n", - __func__, ret, rsp.completion_code); - return CB_ERR; - } - - return CB_SUCCESS; -} - enum cb_err ipmi_get_pcie_config(uint8_t *pcie_config) { int ret; @@ -75,29 +58,6 @@ enum cb_err ipmi_get_slot_id(uint8_t *slot_id) return CB_SUCCESS; } -enum cb_err ipmi_set_post_start(const int port) -{ - int ret; - struct ipmi_rsp rsp; - - ret = ipmi_kcs_message(port, IPMI_NETFN_OEM, 0x0, - IPMI_BMC_SET_POST_START, NULL, 0, (u8 *) &rsp, - sizeof(rsp)); - - if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) { - printk(BIOS_ERR, "IPMI: %s command failed (ret=%d rsp=0x%x)\n", - __func__, ret, rsp.completion_code); - return CB_ERR; - } - if (ret != sizeof(rsp)) { - printk(BIOS_ERR, "IPMI: %s response truncated\n", __func__); - return CB_ERR; - } - - printk(BIOS_DEBUG, "IPMI BMC POST is started\n"); - return CB_SUCCESS; -} - void init_frb2_wdt(void) { uint8_t enable; @@ -135,51 +95,3 @@ void init_frb2_wdt(void) ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE); } } - -enum cb_err ipmi_set_cmos_clear(void) -{ - int ret; - - struct ipmi_oem_rsp { - struct ipmi_rsp resp; - struct boot_order data; - } __packed; - - struct ipmi_oem_rsp rsp; - struct boot_order req; - - /* IPMI OEM get bios boot order command to check if the valid bit and - the CMOS clear bit are both set from the response BootMode byte. */ - - ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, - IPMI_OEM_GET_BIOS_BOOT_ORDER, - NULL, 0, - (unsigned char *) &rsp, sizeof(rsp)); - - if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) { - printk(BIOS_ERR, "IPMI: %s command failed (read ret=%d resp=0x%x)\n", - __func__, ret, rsp.resp.completion_code); - return CB_ERR; - } - - if (!IS_CMOS_AND_VALID_BIT(rsp.data.boot_mode)) { - req = rsp.data; - SET_CMOS_AND_VALID_BIT(req.boot_mode); - ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, - IPMI_OEM_SET_BIOS_BOOT_ORDER, - (const unsigned char *) &req, sizeof(req), - (unsigned char *) &rsp, sizeof(rsp)); - - if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) { - printk(BIOS_ERR, "IPMI: %s command failed (sent ret=%d resp=0x%x)\n", - __func__, ret, rsp.resp.completion_code); - return CB_ERR; - } - - printk(BIOS_INFO, "IPMI CMOS clear requested because CMOS data is invalid.\n"); - - return CB_SUCCESS; - } - - return CB_SUCCESS; -} diff --git a/src/mainboard/ocp/deltalake/ipmi.h b/src/mainboard/ocp/deltalake/ipmi.h index 440a5056ba..269fc034d5 100644 --- a/src/mainboard/ocp/deltalake/ipmi.h +++ b/src/mainboard/ocp/deltalake/ipmi.h @@ -5,19 +5,9 @@ #include <stdint.h> -#define IPMI_NETFN_OEM 0x30 -#define IPMI_OEM_SET_PPIN 0x77 -#define IPMI_OEM_GET_PCIE_CONFIG 0xf4 -#define IPMI_OEM_GET_BOARD_ID 0x37 -#define IPMI_BMC_SET_POST_START 0x73 -#define IPMI_OEM_SET_BIOS_BOOT_ORDER 0x52 -#define IPMI_OEM_GET_BIOS_BOOT_ORDER 0x53 +#define IPMI_OEM_GET_PCIE_CONFIG 0xf4 +#define IPMI_OEM_GET_BOARD_ID 0x37 -#define CMOS_BIT (1 << 1) -#define VALID_BIT (1 << 7) -#define CLEAR_CMOS_AND_VALID_BIT(x) ((x) &= ~(CMOS_BIT | VALID_BIT)) -#define SET_CMOS_AND_VALID_BIT(x) ((x) |= (CMOS_BIT | VALID_BIT)) -#define IS_CMOS_AND_VALID_BIT(x) ((x)&CMOS_BIT && (x)&VALID_BIT) enum config_type { PCIE_CONFIG_UNKNOWN = 0x0, @@ -27,26 +17,8 @@ enum config_type { PCIE_CONFIG_D = 0x4, }; -struct ppin_req { - uint32_t cpu0_lo; - uint32_t cpu0_hi; - uint32_t cpu1_lo; - uint32_t cpu1_hi; -} __packed; - -struct boot_order { - uint8_t boot_mode; - uint8_t boot_dev0; - uint8_t boot_dev1; - uint8_t boot_dev2; - uint8_t boot_dev3; - uint8_t boot_dev4; -} __packed; - -enum cb_err ipmi_set_ppin(struct ppin_req *req); enum cb_err ipmi_get_pcie_config(uint8_t *config); enum cb_err ipmi_get_slot_id(uint8_t *slot_id); -enum cb_err ipmi_set_post_start(const int port); void init_frb2_wdt(void); -enum cb_err ipmi_set_cmos_clear(void); + #endif diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index 4a3e385963..40810b6364 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -353,13 +353,6 @@ void mainboard_silicon_init_params(FSPS_UPD *params) static void mainboard_final(void *chip_info) { - struct ppin_req req = {0}; - - req.cpu0_lo = xeon_sp_ppin[0].lo; - req.cpu0_hi = xeon_sp_ppin[0].hi; - /* Set PPIN to BMC */ - if (ipmi_set_ppin(&req) != CB_SUCCESS) - printk(BIOS_ERR, "ipmi_set_ppin failed\n"); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index 9b182a215c..0a7ecf18d8 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -2,6 +2,7 @@ #include <console/console.h> #include <drivers/ipmi/ipmi_kcs.h> +#include <drivers/ipmi/ocp/ipmi_ocp.h> #include <drivers/vpd/vpd.h> #include <fsp/api.h> #include <FspmUpd.h> diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 67c1fa9d52..2ead76db72 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_TABLES select IPMI_KCS select IPMI_KCS_ROMSTAGE + select IPMI_OCP select MAINBOARD_USES_FSP2_0 select OCP_DMI select PARALLEL_MP_AP_WORK diff --git a/src/mainboard/ocp/tiogapass/devicetree.cb b/src/mainboard/ocp/tiogapass/devicetree.cb index 488f677a95..833bb20e21 100644 --- a/src/mainboard/ocp/tiogapass/devicetree.cb +++ b/src/mainboard/ocp/tiogapass/devicetree.cb @@ -76,6 +76,9 @@ chip soc/intel/xeon_sp/skx register "bmc_i2c_address" = "0x20" register "bmc_boot_timeout" = "90" end + chip drivers/ipmi/ocp # OCP specific IPMI porting + device pnp ca2.1 on end + end end # Intel Corporation C621 Series Chipset LPC/eSPI Controller device pci 1f.1 hidden end # p2sb device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller diff --git a/src/mainboard/ocp/tiogapass/ipmi.c b/src/mainboard/ocp/tiogapass/ipmi.c index 0cdf110bd8..74f96fe36c 100644 --- a/src/mainboard/ocp/tiogapass/ipmi.c +++ b/src/mainboard/ocp/tiogapass/ipmi.c @@ -3,29 +3,13 @@ #include <console/console.h> #include <drivers/ipmi/ipmi_kcs.h> #include <drivers/ipmi/ipmi_ops.h> +#include <drivers/ipmi/ocp/ipmi_ocp.h> #include <drivers/vpd/vpd.h> #include <string.h> #include "ipmi.h" #include "vpd.h" -void ipmi_set_ppin(struct ppin_req *req) -{ - int ret; - struct ipmi_rsp rsp; - - ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN, - (const unsigned char *) req, sizeof(*req), - (unsigned char *) &rsp, sizeof(rsp)); - - if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) { - printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n", - __func__, ret, rsp.completion_code); - return; - } - printk(BIOS_DEBUG, "IPMI Set PPIN to BMC done.\n"); -} - void init_frb2_wdt(void) { char val[VPD_LEN]; diff --git a/src/mainboard/ocp/tiogapass/ipmi.h b/src/mainboard/ocp/tiogapass/ipmi.h index 798f3125ef..93101c2bfe 100644 --- a/src/mainboard/ocp/tiogapass/ipmi.h +++ b/src/mainboard/ocp/tiogapass/ipmi.h @@ -4,17 +4,5 @@ #define TIOGAPASS_IPMI_H #include <types.h> -#define IPMI_NETFN_OEM 0x30 -#define IPMI_OEM_SET_PPIN 0x77 - -/* PPIN for 2 CPU IPMI request */ -struct ppin_req { - uint32_t cpu0_lo; - uint32_t cpu0_hi; - uint32_t cpu1_lo; - uint32_t cpu1_hi; -} __packed; -/* Send CPU0 and CPU1 PPIN to BMC */ -void ipmi_set_ppin(struct ppin_req *req); void init_frb2_wdt(void); #endif diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c index 29148d14ec..df7720538e 100644 --- a/src/mainboard/ocp/tiogapass/ramstage.c +++ b/src/mainboard/ocp/tiogapass/ramstage.c @@ -7,8 +7,6 @@ #include <soc/ramstage.h> #include <soc/lewisburg_pch_gpio_defs.h> -#include "ipmi.h" - extern struct fru_info_str fru_strings; static const struct port_information SMBIOS_type8_info[] = { @@ -185,14 +183,6 @@ static void mainboard_enable(struct device *dev) static void mainboard_final(void *chip_info) { - struct ppin_req req; - - req.cpu0_lo = xeon_sp_ppin[0].lo; - req.cpu0_hi = xeon_sp_ppin[0].hi; - req.cpu1_lo = xeon_sp_ppin[1].lo; - req.cpu1_hi = xeon_sp_ppin[1].hi; - /* Set PPIN to BMC */ - ipmi_set_ppin(&req); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index fb2ce0217a..20c74660ce 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -3,6 +3,7 @@ #include <fsp/api.h> #include <FspmUpd.h> #include <drivers/ipmi/ipmi_kcs.h> +#include <drivers/ipmi/ocp/ipmi_ocp.h> #include <soc/romstage.h> #include <string.h> #include <gpio.h> @@ -53,8 +54,10 @@ static void mainboard_config_iio(FSPM_UPD *mupd) void mainboard_memory_init_params(FSPM_UPD *mupd) { /* It's better to run get BMC selftest result first */ - if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) + if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) { + ipmi_set_post_start(CONFIG_BMC_KCS_BASE); init_frb2_wdt(); + } mainboard_config_iio(mupd); /* do not configure GPIO controller inside FSP-M */ |