summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorChristian Walter <christian.walter@9elements.com>2020-06-24 18:32:21 +0200
committerPatrick Rudolph <siro@das-labor.org>2020-06-26 05:35:43 +0000
commit23cdcb8bef2600e16d0abd438044de2a39194946 (patch)
tree3d7c982c68cd97adc60dde971480b606d725f844 /src/mainboard
parent469dda33397cb2bf971931fd3c06ed9b46a62a4c (diff)
mainboard/prodrive/hermes: Enable EIST in DeviceTree
Enable EIST option in the devicetree in order to make Windows aware of using Intel CPU Turbo Technology. Change-Id: Ied3d7e934fcab2d5d491573245d68d392df5ba34 Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index 33882393b5..93bae8031f 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -131,6 +131,9 @@ chip soc/intel/cannonlake
# Disable S0ix
register "s0ix_enable" = "0"
+ # Enable Turbo
+ register "eist_enable" = "1"
+
register "common_soc_config" = "{
.gspi[0] = {
.speed_mhz = 1,