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authorMartin Roth <martin.roth@se-eng.com>2014-12-29 22:08:15 -0700
committerMartin Roth <gaumless@gmail.com>2015-01-04 20:17:48 +0100
commit15b6325cd4127826460040dfe26c47f37ac3e8e7 (patch)
treeadbdae0183a8da283ac9dba82ed36772b3e8b6a0 /src/mainboard
parent182e551f2d3556ca679237d914ba33bda2de1cbe (diff)
AMD Mainboards - platform_cfg.h: Fixes for doxygen
- Move @def BIOS_SIZE description to the next line - SB_GEN2 changed to SB_GPP_GEN2 - Move the SIO_HWM_BASE_ADDRESS description to the next line Change-Id: Ia3496b0108484f557627304553461932a100dfa5 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/8071 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/advansus/a785e-i/platform_cfg.h8
-rw-r--r--src/mainboard/amd/inagua/platform_cfg.h5
-rw-r--r--src/mainboard/amd/persimmon/platform_cfg.h5
-rw-r--r--src/mainboard/amd/south_station/platform_cfg.h5
-rw-r--r--src/mainboard/amd/torpedo/platform_cfg.h3
-rw-r--r--src/mainboard/amd/union_station/platform_cfg.h5
-rw-r--r--src/mainboard/asrock/e350m1/platform_cfg.h8
-rw-r--r--src/mainboard/asus/m5a88-v/platform_cfg.h8
-rw-r--r--src/mainboard/avalue/eax-785e/platform_cfg.h8
-rw-r--r--src/mainboard/gizmosphere/gizmo/platform_cfg.h5
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h5
-rw-r--r--src/mainboard/lippert/frontrunner-af/platform_cfg.h5
-rw-r--r--src/mainboard/lippert/toucan-af/platform_cfg.h5
13 files changed, 46 insertions, 29 deletions
diff --git a/src/mainboard/advansus/a785e-i/platform_cfg.h b/src/mainboard/advansus/a785e-i/platform_cfg.h
index 6944ab2b6d..29f92d283f 100644
--- a/src/mainboard/advansus/a785e-i/platform_cfg.h
+++ b/src/mainboard/advansus/a785e-i/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h
index 4bd6a0e581..9ca6d95434 100644
--- a/src/mainboard/amd/inagua/platform_cfg.h
+++ b/src/mainboard/amd/inagua/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/persimmon/platform_cfg.h b/src/mainboard/amd/persimmon/platform_cfg.h
index 5357370467..f1b0fdc8e1 100644
--- a/src/mainboard/amd/persimmon/platform_cfg.h
+++ b/src/mainboard/amd/persimmon/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/south_station/platform_cfg.h b/src/mainboard/amd/south_station/platform_cfg.h
index 4bd6a0e581..9ca6d95434 100644
--- a/src/mainboard/amd/south_station/platform_cfg.h
+++ b/src/mainboard/amd/south_station/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h
index de4e89d426..311214cbd8 100644
--- a/src/mainboard/amd/torpedo/platform_cfg.h
+++ b/src/mainboard/amd/torpedo/platform_cfg.h
@@ -25,7 +25,8 @@
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In Hudson-2, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
diff --git a/src/mainboard/amd/union_station/platform_cfg.h b/src/mainboard/amd/union_station/platform_cfg.h
index 4bd6a0e581..9ca6d95434 100644
--- a/src/mainboard/amd/union_station/platform_cfg.h
+++ b/src/mainboard/amd/union_station/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/asrock/e350m1/platform_cfg.h b/src/mainboard/asrock/e350m1/platform_cfg.h
index 6944ab2b6d..29f92d283f 100644
--- a/src/mainboard/asrock/e350m1/platform_cfg.h
+++ b/src/mainboard/asrock/e350m1/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/asus/m5a88-v/platform_cfg.h b/src/mainboard/asus/m5a88-v/platform_cfg.h
index 6944ab2b6d..25574b7d43 100644
--- a/src/mainboard/asus/m5a88-v/platform_cfg.h
+++ b/src/mainboard/asus/m5a88-v/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/avalue/eax-785e/platform_cfg.h b/src/mainboard/avalue/eax-785e/platform_cfg.h
index 6944ab2b6d..25574b7d43 100644
--- a/src/mainboard/avalue/eax-785e/platform_cfg.h
+++ b/src/mainboard/avalue/eax-785e/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -191,7 +192,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
@@ -212,7 +213,8 @@
#define GEC_CONFIG 0
/**
- * @def SIO_HWM_BASE_ADDRESS Super IO HWM base address
+ * @def SIO_HWM_BASE_ADDRESS
+ * Super IO HWM base address
*/
#define SIO_HWM_BASE_ADDRESS 0x290
diff --git a/src/mainboard/gizmosphere/gizmo/platform_cfg.h b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
index 401d981482..8163af363b 100644
--- a/src/mainboard/gizmosphere/gizmo/platform_cfg.h
+++ b/src/mainboard/gizmosphere/gizmo/platform_cfg.h
@@ -26,7 +26,8 @@
#define LEGACY_FREE 1
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -195,7 +196,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
index bbd1d1412d..2d946f8989 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
+++ b/src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h
@@ -23,7 +23,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -192,7 +193,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/lippert/frontrunner-af/platform_cfg.h b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
index 03146d0beb..0c3308d6b1 100644
--- a/src/mainboard/lippert/frontrunner-af/platform_cfg.h
+++ b/src/mainboard/lippert/frontrunner-af/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
diff --git a/src/mainboard/lippert/toucan-af/platform_cfg.h b/src/mainboard/lippert/toucan-af/platform_cfg.h
index 25b048562b..29f3916ae2 100644
--- a/src/mainboard/lippert/toucan-af/platform_cfg.h
+++ b/src/mainboard/lippert/toucan-af/platform_cfg.h
@@ -22,7 +22,8 @@
#define _PLATFORM_CFG_H_
/**
- * @def BIOS_SIZE -> BIOS_SIZE_{1,2,4,8,16}M
+ * @def BIOS_SIZE
+ * BIOS_SIZE_{1,2,4,8,16}M
*
* In SB800, default ROM size is 1M Bytes, if your platform ROM
* bigger than 1M you have to set the ROM size outside CIMx module and
@@ -190,7 +191,7 @@
#define NB_SB_GEN2 TRUE
/**
- * @def SB_GEN2
+ * @def SB_GPP_GEN2
* 0 - Disable
* 1 - Enable
*/
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