diff options
author | Martin Roth <gaumless@gmail.com> | 2017-10-15 14:16:37 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:22:59 +0000 |
commit | 99c45dee0ae62254be36a312d67764784450b564 (patch) | |
tree | 193b20bb742056464374373ba65b07bc901f07c7 /src/mainboard/wyse | |
parent | b94b2c73068eba434cdd162fac1d50cf22524259 (diff) |
AMD GX2 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
cpu/amd/geode_gx2
northbridge/amd/gx2
southbridge/amd/cs5535
Mainboards:
mainboard/amd/rumba
mainboard/lippert/frontrunner
mainboard/wyse/s50
Change-Id: I81c130f53bbfa001edbfdb7a878ef115757f620c
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/wyse')
-rw-r--r-- | src/mainboard/wyse/Kconfig | 30 | ||||
-rw-r--r-- | src/mainboard/wyse/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/Kconfig | 41 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/board_info.txt | 7 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/cmos.layout | 46 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/devicetree.cb | 46 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/irq_tables.c | 63 | ||||
-rw-r--r-- | src/mainboard/wyse/s50/romstage.c | 72 |
9 files changed, 0 insertions, 309 deletions
diff --git a/src/mainboard/wyse/Kconfig b/src/mainboard/wyse/Kconfig deleted file mode 100644 index 9101cf3a45..0000000000 --- a/src/mainboard/wyse/Kconfig +++ /dev/null @@ -1,30 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Nils Jacobs -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if VENDOR_WYSE - -choice - prompt "Mainboard model" - -source "src/mainboard/wyse/*/Kconfig.name" - -endchoice - -source "src/mainboard/wyse/*/Kconfig" - -config MAINBOARD_VENDOR - string - default "Wyse" - -endif # VENDOR_WYSE diff --git a/src/mainboard/wyse/Kconfig.name b/src/mainboard/wyse/Kconfig.name deleted file mode 100644 index 37864fae74..0000000000 --- a/src/mainboard/wyse/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config VENDOR_WYSE - bool "Wyse" diff --git a/src/mainboard/wyse/s50/Kconfig b/src/mainboard/wyse/s50/Kconfig deleted file mode 100644 index 0c1305654b..0000000000 --- a/src/mainboard/wyse/s50/Kconfig +++ /dev/null @@ -1,41 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Nils Jacobs -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -if BOARD_WYSE_S50 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX2 - select NORTHBRIDGE_AMD_GX2 - select SOUTHBRIDGE_AMD_CS5536 - select UDELAY_TSC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select BOARD_ROMSIZE_KB_256 - select POWER_BUTTON_FORCE_DISABLE - select GX2_PROCESSOR_MHZ_366 - -config MAINBOARD_DIR - string - default wyse/s50 - -config MAINBOARD_PART_NUMBER - string - default "s50" - -config IRQ_SLOT_COUNT - int - default 3 - -endif # BOARD_WYSE_S50 diff --git a/src/mainboard/wyse/s50/Kconfig.name b/src/mainboard/wyse/s50/Kconfig.name deleted file mode 100644 index 470e844399..0000000000 --- a/src/mainboard/wyse/s50/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_WYSE_S50 - bool "S50" diff --git a/src/mainboard/wyse/s50/board_info.txt b/src/mainboard/wyse/s50/board_info.txt deleted file mode 100644 index 061101b721..0000000000 --- a/src/mainboard/wyse/s50/board_info.txt +++ /dev/null @@ -1,7 +0,0 @@ -Board name: S50 -Category: settop -Board URL: http://au.wyse.com/products/hardware/thinclients/S50/index.asp -ROM package: PLCC -ROM protocol: LPC -ROM socketed: y -Flashrom support: y diff --git a/src/mainboard/wyse/s50/cmos.layout b/src/mainboard/wyse/s50/cmos.layout deleted file mode 100644 index b7deea89f9..0000000000 --- a/src/mainboard/wyse/s50/cmos.layout +++ /dev/null @@ -1,46 +0,0 @@ -# -# This file is part of the coreboot project. -# -# Copyright (C) 2010 Nils Jacobs -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; version 2 of -# the License. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# - -# ----------------------------------------------------------------- - -entries - -0 384 r 0 reserved_memory -384 1 e 4 boot_option -388 4 h 0 reboot_counter -#392 3 r 0 unused -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -456 1 e 1 ECC_memory -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew - -checksums - -checksum 392 1007 1008 diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb deleted file mode 100644 index 3cf1030f7c..0000000000 --- a/src/mainboard/wyse/s50/devicetree.cb +++ /dev/null @@ -1,46 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2010 Nils Jacobs -## -## This program is free software; you can redistribute it and/or -## modify it under the terms of the GNU General Public License as -## published by the Free Software Foundation; version 2 of -## the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -chip northbridge/amd/gx2 - device domain 0 on - device pci 1.0 on end # Geode GX2 Host Bridge - device pci 1.1 on end # Geode GX2 Graphics Processor - chip southbridge/amd/cs5536 - register "enable_gpio_int_route" = "0x0D0C0700" - register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash - register "enable_USBP4_device" = "0" #0: host, 1:device - register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381) - register "com1_enable" = "1" - register "com1_address" = "0x3F8" - register "com1_irq" = "4" - register "com2_enable" = "0" - register "com2_address" = "0x2F8" - register "com2_irq" = "3" - device pci e.0 on end # Realtek 8139 LAN - device pci f.0 on end # ISA Bridge - device pci f.2 on end # IDE Controller - device pci f.3 on end # Audio - device pci f.4 on end # OHCI - device pci f.5 on end # EHCI - end - end - # APIC cluster is late CPU init. - device cpu_cluster 0 on - chip cpu/amd/geode_gx2 - device lapic 0 on end - end - end -end diff --git a/src/mainboard/wyse/s50/irq_tables.c b/src/mainboard/wyse/s50/irq_tables.c deleted file mode 100644 index 32837454ad..0000000000 --- a/src/mainboard/wyse/s50/irq_tables.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Nils Jacobs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/pirq_routing.h> - -/* Platform IRQs */ -#define PIRQA 11 -#define PIRQB 5 -#define PIRQC 10 -#define PIRQD 10 - -/* Map */ -#define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */ -#define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */ -#define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */ -#define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */ - -/* Link */ -#define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */ -#define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */ -#define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */ -#define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */ - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x0f << 3) | 0x0, /* Interrupt router dev */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x100b, /* Vendor */ - 0x2b, /* Device */ - 0, /* Miniport */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xdc, /* Checksum (has to be set to some value that - * would give 0 after the sum of all bytes - * for this structure (including checksum). - */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x0f << 3) | 0x0, {{0x01, 0x0800}, {0x02, 0x0020}, {0x03, 0x0400}, {0x04, 0x0400}}, 0x5, 0x0}, - {0x00, (0x0d << 3) | 0x0, {{0x04, 0x0400}, {0x03, 0x0400}, {0x02, 0x0020}, {0x01, 0x0800}}, 0x1, 0x0}, - {0x00, (0x0e << 3) | 0x0, {{0x01, 0x0800}, {0x02, 0x0020}, {0x03, 0x0400}, {0x04, 0x0400}}, 0x2, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c deleted file mode 100644 index 8fc797c50c..0000000000 --- a/src/mainboard/wyse/s50/romstage.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Nils Jacobs - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <lib.h> -#include <cpu/x86/bist.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/gx2def.h> -#include <spd.h> -#include <southbridge/amd/cs5536/cs5536.h> - -static inline int spd_read_byte(unsigned int device, unsigned int address) -{ - if (device != DIMM0) - return 0xFF; /* No DIMM1, don't even try. */ - - return smbus_read_byte(device, address); -} - -#include <northbridge/amd/gx2/raminit.h> -#include "northbridge/amd/gx2/pll_reset.c" -#include "northbridge/amd/gx2/raminit.c" -#include "lib/generic_sdram.c" -#include "cpu/amd/geode_gx2/cpureginit.c" -#include "cpu/amd/geode_gx2/syspreinit.c" -#include "cpu/amd/geode_lx/msrinit.c" - -void asmlinkage mainboard_romstage_entry(unsigned long bist) -{ - static const struct mem_controller memctrl [] = { - {.channel0 = {DIMM0, DIMM1}} - }; - - SystemPreInit(); - - cs5536_early_setup(); - - /* cs5536_disable_internal_uart disable them. Set them up now... */ - cs5536_setup_onchipuart(1); - - console_init(); - - /* Halt if there was a built in self test failure */ - report_bist_failure(bist); - - pll_reset(); - - cpuRegInit(); - printk(BIOS_ERR, "done cpuRegInit\n"); - - sdram_initialize(1, memctrl); - printk(BIOS_ERR, "ram setup done\n"); - - msr_init(); -} |