mainboard/*/romstage.c: Sanitize system header inclusions

Fix system include paths to be consistent. Chipset support is
part of the Coreboot 'system' and hence 'non-local' (i.e., in
the same directory or context). One possible product of this, is
to perhaps allow future work to do pre-compiled headers (PCH) on
the buildbot for faster build times. However, this currently just
makes mainboard's consistent.

Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8085
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

5 files changed, 11 insertions, 11 deletions

diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 8a0d384cad..373756faea 100644
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -26,8 +26,8 @@
 #include <device/pnp_def.h>
 #include <console/console.h>
 #include <lib.h>
-#include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/bist.h"
+#include <northbridge/via/cn700/raminit.h>
+#include <cpu/x86/bist.h>
 #include "drivers/pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/via/vt8237r/early_smbus.c"
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index c9b1e8b1c0..8f64949c8f 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -32,14 +32,14 @@
 #include <device/pnp_def.h>
 #include <console/console.h>
 #include <lib.h>
-#include "northbridge/via/vx800/vx800.h"
-#include "cpu/x86/bist.h"
+#include <northbridge/via/vx800/vx800.h>
+#include <cpu/x86/bist.h>
 #include "drivers/pc80/udelay_io.c"
 #include "lib/delay.c"
 #include <string.h>
 /* This file contains the board-special SI value for raminit.c. */
 #include "driving_clk_phase_data.c"
-#include "northbridge/via/vx800/raminit.h"
+#include <northbridge/via/vx800/raminit.h>
 #include "northbridge/via/vx800/raminit.c"
 #include "wakeup.h"
 #include <superio/winbond/common/winbond.h>
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index 01d955a225..b2244cfac3 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -33,8 +33,8 @@
 #include <timestamp.h>
 #include <console/cbmem_console.h>
 
-#include "northbridge/via/vx900/early_vx900.h"
-#include "northbridge/via/vx900/raminit.h"
+#include <northbridge/via/vx900/early_vx900.h>
+#include <northbridge/via/vx900/raminit.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>
 
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 57e5cd09a3..7261e20a3d 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -26,8 +26,8 @@
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <lib.h>
-#include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/bist.h"
+#include <northbridge/via/cn700/raminit.h>
+#include <cpu/x86/bist.h>
 #include "drivers/pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/via/vt8237r/early_smbus.c"
diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c
index bb2d8789cd..8204ae384d 100644
--- a/src/mainboard/via/vt8454c/romstage.c
+++ b/src/mainboard/via/vt8454c/romstage.c
@@ -26,8 +26,8 @@
 #include <device/pnp_def.h>
 #include <console/console.h>
 #include <lib.h>
-#include "northbridge/via/cx700/raminit.h"
-#include "cpu/x86/bist.h"
+#include <northbridge/via/cx700/raminit.h>
+#include <cpu/x86/bist.h>
 #include "drivers/pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "northbridge/via/cx700/early_smbus.c"