diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-02-08 12:20:50 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-02-08 12:20:50 +0000 |
commit | 38f147ed3d9fdd6bfb23d7226f6fdd3fc5db53d0 (patch) | |
tree | ecb680abac7c73798a4abf5f5733c6ad3e179bb4 /src/mainboard/via/pc2500e/auto.c | |
parent | d51eddbb6611965165ad72eb3fb04377a51ab64a (diff) |
janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/pc2500e/auto.c')
-rw-r--r-- | src/mainboard/via/pc2500e/auto.c | 85 |
1 files changed, 0 insertions, 85 deletions
diff --git a/src/mainboard/via/pc2500e/auto.c b/src/mainboard/via/pc2500e/auto.c deleted file mode 100644 index 489730668c..0000000000 --- a/src/mainboard/via/pc2500e/auto.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#define ASSEMBLY 1 -#define __PRE_RAM__ - -#include <stdint.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/romcc_io.h> -#include <arch/hlt.h> -#include "option_table.h" -#include "pc80/mc146818rtc_early.c" -#include "pc80/serial.c" -#include "arch/i386/lib/console.c" -#include "lib/ramtest.c" -#include "northbridge/via/cn700/raminit.h" -#include "cpu/x86/mtrr/earlymtrr.c" -#include "cpu/x86/bist.h" -#include "pc80/udelay_io.c" -#include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" -#include "southbridge/via/vt8237r/vt8237r_early_smbus.c" -#include "superio/ite/it8716f/it8716f_early_serial.c" - -#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) - -static int spd_read_byte(u16 device, u16 address) -{ - return smbus_read_byte(device, address); -} - -#include "northbridge/via/cn700/raminit.c" - -static const struct mem_controller ctrl = { - .d0f0 = 0x0000, - .d0f2 = 0x2000, - .d0f3 = 0x3000, - .d0f4 = 0x4000, - .d0f7 = 0x7000, - .d1f0 = 0x8000, - .channel0 = { 0x50 }, /* TODO: CN700 currently only supports 1 DIMM. */ -}; - -static void main(unsigned long bist) -{ - /* Enable multifunction for northbridge. */ - pci_write_config8(ctrl.d0f0, 0x4f, 0x01); - - it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); - console_init(); - - enable_smbus(); - smbus_fixup(&ctrl); - - if (bist == 0) - early_mtrr_init(); - - /* Halt if there was a built-in self test failure. */ - report_bist_failure(bist); - - ddr_ram_setup(&ctrl); - - /* ram_check(0, 640 * 1024); */ -} |