diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/via/epia | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia')
| -rw-r--r-- | src/mainboard/via/epia/irq_tables.c | 2 | ||||
| -rw-r--r-- | src/mainboard/via/epia/romstage.c | 16 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/via/epia/irq_tables.c b/src/mainboard/via/epia/irq_tables.c index f3978d5e81..8b4352d25a 100644 --- a/src/mainboard/via/epia/irq_tables.c +++ b/src/mainboard/via/epia/irq_tables.c @@ -1,4 +1,4 @@ -/* This file was generated by getpir.c, do not modify! +/* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c index 202b117a42..66a8d203ed 100644 --- a/src/mainboard/via/epia/romstage.c +++ b/src/mainboard/via/epia/romstage.c @@ -27,13 +27,13 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" */ -static void enable_mainboard_devices(void) +static void enable_mainboard_devices(void) { device_t dev; /* dev 0 for southbridge */ - + dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0); - + if (dev == PCI_DEV_INVALID) { die("Southbridge not found!!!\n"); } @@ -41,7 +41,7 @@ static void enable_mainboard_devices(void) pci_write_config8(dev, 0x50, 7); pci_write_config8(dev, 0x51, 0xff); #if 0 - // This early setup switches IDE into compatibility mode before PCI gets + // This early setup switches IDE into compatibility mode before PCI gets // a chance to assign I/Os // movl $CONFIG_ADDR(0, 0x89, 0x42), %eax // movb $0x09, %dl @@ -49,7 +49,7 @@ static void enable_mainboard_devices(void) // PCI_WRITE_CONFIG_BYTE // #endif - /* we do this here as in V2, we can not yet do raw operations + /* we do this here as in V2, we can not yet do raw operations * to pci! */ /* changed this to work correctly on later revisions of LB. @@ -64,7 +64,7 @@ static void enable_mainboard_devices(void) pci_write_config8(dev, 0x42, 0); } -static void enable_shadow_ram(void) +static void enable_shadow_ram(void) { device_t dev = 0; unsigned char shadowreg; @@ -86,7 +86,7 @@ static void main(unsigned long bist) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - + enable_mainboard_devices(); enable_smbus(); enable_shadow_ram(); @@ -98,7 +98,7 @@ static void main(unsigned long bist) sdram_set_registers((const struct mem_controller *) 0); sdram_set_spd_registers((const struct mem_controller *) 0); sdram_enable(0, (const struct mem_controller *) 0); - + /* Check all of memory */ #if 0 ram_check(0x00000000, msr.lo); |