Changes to allow Via/Epia code to be compiled after recent code changes.

New Files :-
	src/cpu/via/model_centaur/Config.lb
	src/cpu/via/model_centaur/model_centaur_init.c

Updated Files :-
	src/arch/i386/include/arch/smp/mpspec.h
		- make write_smp_table a define for non smp systems
	src/cpu/x86/lapic/lapic_cpu_init.c
		- change possible typo
	src/mainboard/via/epia/Config.lb
	src/mainboard/via/epia/Options.lb

	src/mainboard/via/epia/auto.c
	src/mainboard/via/epia/chip.h
	src/mainboard/via/epia/failover.c
		- updated after recent code changes
	src/northbridge/via/vt8601/chip.h
	src/northbridge/via/vt8601/northbridge.c
	src/northbridge/via/vt8601/raminit.c
		- corrections after recent code changes to allow compiling
	src/southbridge/via/vt8231/chip.h
	src/southbridge/via/vt8231/vt8231.c
		- initial pass to allow compiling after recent code changes.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1726 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 60 insertions, 55 deletions

diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb
index ce6f762985..d8485dff0a 100644
--- a/src/mainboard/via/epia/Config.lb
+++ b/src/mainboard/via/epia/Config.lb
@@ -14,9 +14,8 @@ end
 ## Compute the start location and size size of
 ## The linuxBIOS bootloader.
 ##
-default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-default CONFIG_ROM_STREAM     = 1
+default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
 
 ##
 ## Compute where this copy of linuxBIOS will start in the boot rom
@@ -45,6 +44,7 @@ arch i386 end
 
 
 driver mainboard.o
+if HAVE_PIRQ_TABLE object irq_tables.o end
 #object reset.o
 
 ##
@@ -128,59 +128,63 @@ dir /pc80
 config chip.h
 
 chip northbridge/via/vt8601
-#	pci 0:0.0
-#	pci 0:1.0
-	chip southbridge/via/vt8231
-#		pci 0:11.0
-#		pci 0:11.1
-#		pci 0:11.2
-#		pci 0:11.3
-#		pci 0:11.4
-#		pci 0:11.5
-#		pci 0:11.6
-#		pci 0:12.0
-		register "enable_usb" = "0"
-		register "enable_native_ide" = "0"
-		register "enable_com_ports" = "1"
-		register "enable_keyboard" = "0"
-		register "enable_nvram" = "1"
-                chip superio/winbond/w83627hf
-                        device pnp 2e.0 on #  Floppy
-                                 io 0x60 = 0x3f0
-                                irq 0x70 = 6
-                                drq 0x74 = 2
-			end
-                        device pnp 2e.1 off #  Parallel Port
-                                 io 0x60 = 0x378
-                                irq 0x70 = 7
-			end
-                        device pnp 2e.2 on #  Com1
-                                 io 0x60 = 0x3f8
-                                irq 0x70 = 4
-			end
-                        device pnp 2e.3 off #  Com2
-                                io 0x60 = 0x2f8
-                                irq 0x70 = 3
-			end
-                        device pnp 2e.5 on #  Keyboard
-                                 io 0x60 = 0x60
-                                 io 0x62 = 0x64
-                               irq 0x70 = 1
-				irq 0x72 = 12
-			end
-                        device pnp 2e.6 off end #  CIR
-                        device pnp 2e.7 off end #  GAME_MIDI_GIPO1
-                        device pnp 2e.8 off end #  GPIO2
-                        device pnp 2e.9 off end #  GPIO3
-                        device pnp 2e.a off end #  ACPI
-                        device pnp 2e.b on  #  HW Monitor
- 				 io 0x60 = 0x290
-			end
-			register "com1" = "{1}"
-		#	register "com1" = "{1, 0, 0x3f8, 4}"
-		#	register "lpt" = "{1}"
-                end
-	end
+  device pci_domain 0 on
+    device pci 0.0 on
+      chip southbridge/via/vt8231
+        register "enable_usb" = "0"
+        register "enable_native_ide" = "0"
+        register "enable_com_ports" = "1"
+        register "enable_keyboard" = "0"
+        register "enable_nvram" = "1"
+        device pci 11.0 on            # Southbridge
+          device pci 11.1 on  end       # Ide
+          device pci 11.2 off end       # Usb
+          device pci 11.3 off end       # Usb
+          device pci 11.4 off end       # ACPI
+          device pci 11.5 off end       # Audio
+          device pci 11.6 on            # Com
+            chip superio/winbond/w83627hf
+              device pnp 2e.0 on      #  Floppy
+                 io 0x60 = 0x3f0
+                irq 0x70 = 6
+                drq 0x74 = 2
+              end
+              device pnp 2e.1 off     #  Parallel Port
+                 io 0x60 = 0x378
+                irq 0x70 = 7
+              end
+              device pnp 2e.2 on      #  Com1
+                 io 0x60 = 0x3f8
+                irq 0x70 = 4
+              end
+              device pnp 2e.3 off     #  Com2
+                 io 0x60 = 0x2f8
+                irq 0x70 = 3
+              end
+              device pnp 2e.5 on      #  Keyboard
+                 io 0x60 = 0x60
+                 io 0x62 = 0x64
+                irq 0x70 = 1
+                irq 0x72 = 12
+              end
+              device pnp 2e.6 off end #  CIR
+              device pnp 2e.7 off end #  GAME_MIDI_GIPO1
+              device pnp 2e.8 off end #  GPIO2
+              device pnp 2e.9 off end #  GPIO3
+              device pnp 2e.a off end #  ACPI
+              device pnp 2e.b on      #  HW Monitor
+                 io 0x60 = 0x290
+              end
+              register "com1" = "{1}"
+            end
+          end
+          device pci 12.0 on end        # Ethernet
+        end
+      end
+    end
+  end
+  chip cpu/via/model_centaur
+  end
 end
 
 ##
@@ -188,3 +192,4 @@ end
 ##
 mainboardinit pc80/serial.inc
 mainboardinit arch/i386/lib/console.inc
+