diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-14 17:11:47 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-14 17:11:47 +0000 |
commit | 17b60a985b94a6a6cb71fa3b5ed85e09e42e0ea0 (patch) | |
tree | 4cd5cbb2d9185f552d7892c51a1e6f1d7a6b5d99 /src/mainboard/via/epia-m700 | |
parent | f4cc089f1eb4b8b4a31c4aae63990034f49c5a97 (diff) |
drop setup_ics code that was blatantly copied from cx700 and
was mainboard specific and unused there already.
some more minor warning fixes.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-m700')
-rw-r--r-- | src/mainboard/via/epia-m700/romstage.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index ab148e478d..2e51c958d0 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -24,6 +24,7 @@ #define RAMINIT_SYSINFO 1 #define CACHE_AS_RAM_ADDRESS_DEBUG 0 +#define PAYLOAD_IS_SEABIOS 0 #include <stdint.h> #include <device/pci_def.h> @@ -85,11 +86,6 @@ static int acpi_is_wakeup_early_via_vx800(void) return result; } -static inline int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - /* All content of this function came from the cx700 port of coreboot. */ static void enable_mainboard_devices(void) { @@ -273,7 +269,8 @@ static const struct VIA_PCI_REG_INIT_TABLE mNbStage1InitTbl[] = { #define gCom1Base 0x3f8 #define gCom2Base 0x2f8 -void EmbedComInit(void) +#if 0 +static void EmbedComInit(void) { u8 ByteVal; u16 ComBase; @@ -379,6 +376,7 @@ void EmbedComInit(void) /* SOutput("Embedded COM output\n"); */ /* while(1); */ } +#endif /* cache_as_ram.inc jumps to here. */ void main(unsigned long bist) |