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authorUwe Hermann <uwe@hermann-uwe.de>2009-07-15 00:03:28 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2009-07-15 00:03:28 +0000
commit4e2ffb8812bd91e6f564a05b3e733a55b60a68b5 (patch)
tree9eecb3d519ff3855fc8846f211d9fafec1bac737 /src/mainboard/via/epia-m700/Config.lb
parent3839a8ebd8b4a8d249755ce9031a70913a24dbf5 (diff)
Fix VIA EPIA-M700 target enough for a first serial boot log.
Add the respective Super I/O config in Config.lb (Winbond W83697HG), enable COM1 on the board, fix irq_table.c, as well as the PCI devices listed in Config.lb (based on lspci output). This has been tested by Jakob Bornecrantz <wallbraker@gmail.com> on hardware, i.e. there is serial output. It does not yet boot to a Linux console successfully, more fixing will be needed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Jakob Bornecrantz <wallbraker@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-m700/Config.lb')
-rw-r--r--src/mainboard/via/epia-m700/Config.lb53
1 files changed, 43 insertions, 10 deletions
diff --git a/src/mainboard/via/epia-m700/Config.lb b/src/mainboard/via/epia-m700/Config.lb
index 636f69ef8e..06eb3d0972 100644
--- a/src/mainboard/via/epia-m700/Config.lb
+++ b/src/mainboard/via/epia-m700/Config.lb
@@ -109,21 +109,54 @@ config chip.h
chip northbridge/via/vx800 # Northbridge
device pci_domain 0 on
- device pci 0.0 on end # AGP Bridge
+ device pci 0.0 on end # Host Bridge
device pci 0.1 on end # Error Reporting
device pci 0.2 on end # Host Bus Control
- device pci 0.3 on end # Memory Controller
+ device pci 0.3 on end # PCI to PCI Bridge
device pci 0.4 on end # Power Management
- device pci 0.7 on end # V-Link Controller
+ device pci 0.5 on end # APIC and Central Traffic Control
+ device pci 0.6 on end # Scratch Registers
+ device pci 0.7 on end # North-South Module Interface Control
device pci 1.0 on end # PCI Bridge
- # device pci f.0 on end # IDE/SATA
+ device pci f.0 on end # IDE/SATA
# device pci f.1 on end # IDE
- # device pci 10.0 on end # USB 1.1
- # device pci 10.1 on end # USB 1.1
- # device pci 10.2 on end # USB 1.1
- # device pci 10.4 on end # USB 2.0
- # device pci 11.0 on # Southbridge LPC
- # end
+ device pci 10.0 on end # USB 1.1
+ device pci 10.1 on end # USB 1.1
+ device pci 10.2 on end # USB 1.1
+ device pci 10.4 on end # USB 2.0
+ device pci 11.0 on # Bus Control and Power Management (SB, LPC)
+ chip superio/winbond/w83697hf
+ # TODO: Check all devices, this may need some more work.
+ device pnp 2e.0 off # Floppy (N/A?)
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel Port (N/A?)
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ drq 0x74 = 4
+ end
+ device pnp 2e.2 on # COM1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 on # COM2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.6 off end # Consumer IR
+ device pnp 2e.7 off end # Game port, GPIO 1
+ device pnp 2e.8 off end # MIDI port, GPIO 5
+ device pnp 2e.9 off end # GPIO 2-4
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b on # HWM
+ io 0x60 = 0x290
+ end
+ end
+ end
+ device pci 11.7 on end # North-South Module Interface Control
+ device pci 14.0 on end # HD Audio (Azalia)
end
device apic_cluster 0 on # APIC cluster
chip cpu/via/model_c7 # VIA C7