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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/via/epia-m/romstage.c
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-m/romstage.c')
-rw-r--r--src/mainboard/via/epia-m/romstage.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c
index 6a8446ac04..54feb26552 100644
--- a/src/mainboard/via/epia-m/romstage.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -26,27 +26,27 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/via/vt8623/raminit.c"
-static void enable_mainboard_devices(void)
+static void enable_mainboard_devices(void)
{
device_t dev;
-
+
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_8235), 0);
-
+
if (dev == PCI_DEV_INVALID) {
die("Southbridge not found!!!\n");
}
pci_write_config8(dev, 0x50, 0x80);
pci_write_config8(dev, 0x51, 0x1f);
#if 0
- // This early setup switches IDE into compatibility mode before PCI gets
+ // This early setup switches IDE into compatibility mode before PCI gets
// a chance to assign I/Os
// movl $CONFIG_ADDR(0, 0x89, 0x42), %eax
// // movb $0x09, %dl
// movb $0x00, %dl
// PCI_WRITE_CONFIG_BYTE
#endif
- /* we do this here as in V2, we can not yet do raw operations
+ /* we do this here as in V2, we can not yet do raw operations
* to pci!
*/
dev += 0x100; /* ICKY */
@@ -58,7 +58,7 @@ static void enable_mainboard_devices(void)
pci_write_config8(dev, 0x3d, 0);
}
-static void enable_shadow_ram(void)
+static void enable_shadow_ram(void)
{
device_t dev = 0; /* no need to look up 0:0.0 */
unsigned char shadowreg;
@@ -108,7 +108,7 @@ static void main(unsigned long bist)
enable_shadow_ram();
ddr_ram_setup((const struct mem_controller *)0);
-
+
/* Check all of memory */
#if 0
static const struct {
@@ -129,7 +129,7 @@ static void main(unsigned long bist)
}
//dump_pci_devices();
-
+
print_spew("Leaving romstage.c:main()\n");
}