diff options
| author | Bari Ari <bari@onelabs.com> | 2008-09-01 01:48:07 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-09-01 01:48:07 +0000 |
| commit | d4759d0f22892cc740d5aae559eaf5b9b5ab735a (patch) | |
| tree | adbd541327d47654590814029eb3493d2e5deef3 /src/mainboard/via/epia-cn | |
| parent | 3153863567f51c9173227b9cb4375d53e6f3e6ed (diff) | |
This patch gets the Epia-CN working without ACPI or APIC.
All devices work, no irq storms. Enjoy.
Signed-off-by: Bari Ari <bari@onelabs.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via/epia-cn')
| -rw-r--r-- | src/mainboard/via/epia-cn/Config.lb | 14 | ||||
| -rw-r--r-- | src/mainboard/via/epia-cn/Options.lb | 2 | ||||
| -rw-r--r-- | src/mainboard/via/epia-cn/auto.c | 45 |
3 files changed, 28 insertions, 33 deletions
diff --git a/src/mainboard/via/epia-cn/Config.lb b/src/mainboard/via/epia-cn/Config.lb index 52eb18492f..6e48b2b6de 100644 --- a/src/mainboard/via/epia-cn/Config.lb +++ b/src/mainboard/via/epia-cn/Config.lb @@ -98,12 +98,14 @@ chip northbridge/via/cn700 # Northbridge register "ide0_80pin_cable" = "0" register "ide1_80pin_cable" = "0" device pci f.0 on end # IDE - register "fn_ctrl_lo" = "0x8a" - register "fn_ctrl_hi" = "0x9d" - device pci 10.0 on end # USB 1.1 - device pci 10.1 on end # USB 1.1 - device pci 10.2 on end # USB 1.1 - device pci 10.3 on end # USB 1.1 + register "fn_ctrl_lo" = "0x80" + register "fn_ctrl_hi" = "0x1d" + device pci 10.0 on end # OHCI + device pci 10.1 on end # OHCI + device pci 10.2 on end # OHCI + device pci 10.3 on end # OHCI + device pci 10.4 on end # EHCI + device pci 10.5 on end # UDCI device pci 11.0 on # Southbridge LPC chip superio/via/vt1211 # Super I/O device pnp 2e.0 off # Floppy diff --git a/src/mainboard/via/epia-cn/Options.lb b/src/mainboard/via/epia-cn/Options.lb index fee1920a6c..7d392c4b84 100644 --- a/src/mainboard/via/epia-cn/Options.lb +++ b/src/mainboard/via/epia-cn/Options.lb @@ -94,7 +94,7 @@ default USE_OPTION_TABLE = 0 default _RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 default CROSS_COMPILE = "" -default CC = "$(CROSS_COMPILE)gcc -m32" +default CC = "$(CROSS_COMPILE)gcc -m32 -fno-stack-protector" default HOSTCC = "gcc" ## diff --git a/src/mainboard/via/epia-cn/auto.c b/src/mainboard/via/epia-cn/auto.c index 592547b18a..62a3b2646e 100644 --- a/src/mainboard/via/epia-cn/auto.c +++ b/src/mainboard/via/epia-cn/auto.c @@ -55,34 +55,27 @@ static void enable_mainboard_devices(void) { device_t dev; u8 reg; - - /* - * If I enable SATA, FILO will not find the IDE disk, so I'll disable - * SATA here. To not conflict with PCI spec, I'll move IDE device - * from 00:0f.1 to 00:0f.0. + + dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); + if (dev == PCI_DEV_INVALID) + die("Southbridge not found!!!\n"); + + /* bit=0 means enable function (per CX700 datasheet) + * 5 16.1 USB 2 + * 4 16.0 USB 1 + * 3 15.0 SATA and PATA + * 2 16.2 USB 3 + * 1 16.4 USB EHCI */ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_VT6420_SATA), 0); - if (dev != PCI_DEV_INVALID) { - /* Enable PATA. */ - reg = pci_read_config8(dev, 0xd1); - reg |= 0x08; - pci_write_config8(dev, 0xd1, reg); - reg = pci_read_config8(dev, 0x49); - reg |= 0x80; - pci_write_config8(dev, 0x49, reg); - } else { - print_debug("No SATA device\r\n"); - } + pci_write_config8(dev, 0x50, 0x80); - /* Disable SATA, and PATA device will be 00:0f.0. */ - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); - if (dev == PCI_DEV_INVALID) - die("Southbridge not found!!!\r\n"); - reg = pci_read_config8(dev, 0x50); - reg |= 0x08; - pci_write_config8(dev, 0x50, reg); + /* bit=1 means enable internal function (per CX700 datasheet) + * 3 Internal RTC + * 2 Internal PS2 Mouse + * 1 Internal KBC Configuration + * 0 Internal Keyboard Controller + */ + pci_write_config8(dev, 0x51, 0x1d); } static const struct mem_controller ctrl = { |