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authorJohn Zhao <john.zhao@intel.com>2020-06-30 17:36:24 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-07-12 19:31:01 +0000
commit23d3ad0f640c32a452cc36eb3040f324feeee3e8 (patch)
tree67d48f7afd89e9af8067d06b26e7465ec3d671bf /src/mainboard/up
parentef079c86ea3c24dd30d1bbad2e446632ec1c0104 (diff)
mb/intel/tglrvp: Enable s0ix for tglrvp up3 and up4
This change enables s0ix for tglrvp up3 and up4 platform. TEST=Built image and booted to kernel. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I657bee1d7ee120ae15ccb4a33f9eb2fcf5cca65a Reviewed-on: https://review.coreboot.org/c/coreboot/+/42954 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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